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authorimp <imp@FreeBSD.org>2002-07-20 22:29:23 +0000
committerimp <imp@FreeBSD.org>2002-07-20 22:29:23 +0000
commit1d6ce2645d4b061648e6cfaa09780a73fcd10020 (patch)
tree5df41ea50324914b8bd4b3937687ffcfb505afce /sys/pccard
parentd9f77c5b739a154c9ca07cbdf0e2679cd57449d5 (diff)
downloadFreeBSD-src-1d6ce2645d4b061648e6cfaa09780a73fcd10020.zip
FreeBSD-src-1d6ce2645d4b061648e6cfaa09780a73fcd10020.tar.gz
Add support for writing to mapping high memory for pccard memory
windows. Right now we only support pci chips that are memory mapped. These are the most common bridges in use today and will help a large majority of the users. I/O mapped PCI chips support this functionality in a different way, as do some of the ISA bridges (but only when mounted on a motherboard). These chips are not supported by this change.
Diffstat (limited to 'sys/pccard')
-rw-r--r--sys/pccard/i82365.h7
-rw-r--r--sys/pccard/pcic.c11
-rw-r--r--sys/pccard/pcic_pci.c2
-rw-r--r--sys/pccard/pcicvar.h1
4 files changed, 21 insertions, 0 deletions
diff --git a/sys/pccard/i82365.h b/sys/pccard/i82365.h
index 7fa4dc6..add82c1 100644
--- a/sys/pccard/i82365.h
+++ b/sys/pccard/i82365.h
@@ -104,6 +104,13 @@
#define PCIC_TIME_CMD1 0x3e
#define PCIC_TIME_RECOV1 0x3f
+/* Yenta only registers */
+#define PCIC_MEMORY_HIGH0 0x40 /* A31..A25 of mapping addres for */
+#define PCIC_MEMORY_HIGH1 0x41 /* the memory windows. */
+#define PCIC_MEMORY_HIGH2 0x42
+#define PCIC_MEMORY_HIGH3 0x43
+
+
#define PCIC_SLOT_SIZE 0x40 /* Size of register set for one slot */
/* Now register bits, ordered by reg # */
diff --git a/sys/pccard/pcic.c b/sys/pccard/pcic.c
index 3e028e7..ec9b1bd 100644
--- a/sys/pccard/pcic.c
+++ b/sys/pccard/pcic.c
@@ -223,14 +223,25 @@ pcic_memory(struct slot *slt, int win)
}
if (mp->flags & MDF_ACTIVE) {
unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
+ if ((sys_addr >> 12) != 0 &&
+ (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) == 0) {
+ printf("This pcic does not support mapping > 24M\n");
+ return (ENXIO);
+ }
/*
* Write the addresses, card offsets and length.
* The values are all stored as the upper 12 bits of the
* 24 bit address i.e everything is allocated as 4 Kb chunks.
+ * Memory mapped cardbus bridges extend this slightly to allow
+ * one to set the upper 8 bits of the 32bit address as well.
+ * If the chip supports it, then go ahead and write those
+ * upper 8 bits.
*/
pcic_putw(sp, reg, sys_addr & 0xFFF);
pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
+ if (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY)
+ sp->putb(sp, PCIC_MEMORY_HIGH0 + win, sys_addr >> 12);
/*
* Each 16 bit register has some flags in the upper bits.
*/
diff --git a/sys/pccard/pcic_pci.c b/sys/pccard/pcic_pci.c
index 33b9cc2..b6ba964 100644
--- a/sys/pccard/pcic_pci.c
+++ b/sys/pccard/pcic_pci.c
@@ -1269,6 +1269,8 @@ pcic_pci_attach(device_t dev)
sp->revision = 0;
sc->flags = PCIC_CARDBUS_POWER;
}
+ /* All memory mapped cardbus bridges have these registers */
+ sc->flags |= PCIC_YENTA_HIGH_MEMORY;
sp->slt = (struct slot *) 1;
sc->csc_route = pcic_intr_path;
sc->func_route = pcic_intr_path;
diff --git a/sys/pccard/pcicvar.h b/sys/pccard/pcicvar.h
index 3df95a2..da372e2 100644
--- a/sys/pccard/pcicvar.h
+++ b/sys/pccard/pcicvar.h
@@ -52,6 +52,7 @@ struct pcic_softc
#define PCIC_KING_POWER 0x00000010 /* Uses IBM KING regs */
#define PCIC_RICOH_POWER 0x00000020 /* Uses the ricoh power regs */
#define PCIC_CARDBUS_POWER 0x00000040 /* Cardbus power regs */
+#define PCIC_YENTA_HIGH_MEMORY 0x0080 /* Can do high memory mapping */
enum pcic_intr_way csc_route; /* How to route csc interrupts */
enum pcic_intr_way func_route; /* How to route function ints */
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