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| author | sgalabov <sgalabov@FreeBSD.org> | 2016-04-18 06:15:58 +0000 |
|---|---|---|
| committer | sgalabov <sgalabov@FreeBSD.org> | 2016-04-18 06:15:58 +0000 |
| commit | f3d0ff63b0c698e0862d020b68aabc9294d5619d (patch) | |
| tree | 0d8de12043c6d922a8023e5f692b96a1afb79796 /sys/mips | |
| parent | a32949ae45ffcfdbd9a3a1f057f0a684f61592f2 (diff) | |
| download | FreeBSD-src-f3d0ff63b0c698e0862d020b68aabc9294d5619d.zip FreeBSD-src-f3d0ff63b0c698e0862d020b68aabc9294d5619d.tar.gz | |
Allow RT3350 CPU clock to be detected as part of RT3050/RT3052 detection
OpenWRT's dts files treat RT3050/RT3052/RT3350 within the same SoC dtsi
file, so we need to distinguish between the three dynamically, mainly
because the bit we use to determine the clock speed on RT3050/RT3052
can actually be floating on RT3350 and RT3350 is always at 320MHz.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5983
Diffstat (limited to 'sys/mips')
| -rw-r--r-- | sys/mips/mediatek/mtk_soc.c | 18 | ||||
| -rw-r--r-- | sys/mips/mediatek/mtk_sysctl.h | 2 |
2 files changed, 12 insertions, 8 deletions
diff --git a/sys/mips/mediatek/mtk_soc.c b/sys/mips/mediatek/mtk_soc.c index 5784fec..f8e974c 100644 --- a/sys/mips/mediatek/mtk_soc.c +++ b/sys/mips/mediatek/mtk_soc.c @@ -76,13 +76,17 @@ static const struct ofw_compat_data compat_data[] = { static uint32_t mtk_detect_cpuclk_rt305x(bus_space_tag_t bst, bus_space_handle_t bsh) { - uint32_t clk; + uint32_t val; + + val = bus_space_read_4(bst, bsh, SYSCTL_CHIPID0_3); + if (val == RT3350_CHIPID0_3) + return (MTK_CPU_CLK_320MHZ); - clk = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - clk >>= RT305X_CPU_CLKSEL_OFF; - clk &= RT305X_CPU_CLKSEL_MSK; + val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); + val >>= RT305X_CPU_CLKSEL_OFF; + val &= RT305X_CPU_CLKSEL_MSK; - return ((clk == 0) ? MTK_CPU_CLK_320MHZ : MTK_CPU_CLK_384MHZ); + return ((val == 0) ? MTK_CPU_CLK_320MHZ : MTK_CPU_CLK_384MHZ); } static uint32_t @@ -265,10 +269,8 @@ mtk_soc_try_early_detect(void) switch (mtk_soc_socid) { case MTK_SOC_RT3050: /* fallthrough */ case MTK_SOC_RT3052: - mtk_soc_cpuclk = mtk_detect_cpuclk_rt305x(bst, bsh); - break; case MTK_SOC_RT3350: - mtk_soc_cpuclk = MTK_CPU_CLK_320MHZ; + mtk_soc_cpuclk = mtk_detect_cpuclk_rt305x(bst, bsh); break; case MTK_SOC_RT3352: mtk_soc_cpuclk = mtk_detect_cpuclk_rt3352(bst, bsh); diff --git a/sys/mips/mediatek/mtk_sysctl.h b/sys/mips/mediatek/mtk_sysctl.h index 0ef908e..5982430 100644 --- a/sys/mips/mediatek/mtk_sysctl.h +++ b/sys/mips/mediatek/mtk_sysctl.h @@ -52,6 +52,8 @@ #define SYSCFG1_USB_HOST_MODE (1<<10) +#define RT3350_CHIPID0_3 0x33335452 + extern uint32_t mtk_sysctl_get(uint32_t); extern void mtk_sysctl_set(uint32_t, uint32_t); extern void mtk_sysctl_clr_set(uint32_t, uint32_t, uint32_t); |
