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| author | andrew <andrew@FreeBSD.org> | 2015-04-11 17:16:23 +0000 |
|---|---|---|
| committer | andrew <andrew@FreeBSD.org> | 2015-04-11 17:16:23 +0000 |
| commit | e2a65d5cfa2a52472daa9b9658f4fa10f742291f (patch) | |
| tree | 3242f4dc9f4677a166d03c3acecc2475385f4f3d /sys/mips/rt305x/uart_dev_rt305x.c | |
| parent | 7f65d178b4fad420cb01a2ff4b3163278d3025dc (diff) | |
| download | FreeBSD-src-e2a65d5cfa2a52472daa9b9658f4fa10f742291f.zip FreeBSD-src-e2a65d5cfa2a52472daa9b9658f4fa10f742291f.tar.gz | |
Add support for the uart classes to set their default register shift value.
This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.
This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.
MFC after: 1 week
Diffstat (limited to 'sys/mips/rt305x/uart_dev_rt305x.c')
| -rw-r--r-- | sys/mips/rt305x/uart_dev_rt305x.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/mips/rt305x/uart_dev_rt305x.c b/sys/mips/rt305x/uart_dev_rt305x.c index d4f2319..5d23b1e 100644 --- a/sys/mips/rt305x/uart_dev_rt305x.c +++ b/sys/mips/rt305x/uart_dev_rt305x.c @@ -217,7 +217,8 @@ struct uart_class uart_rt305x_uart_class = { sizeof(struct rt305x_uart_softc), .uc_ops = &uart_rt305x_uart_ops, .uc_range = 1, /* use hinted range */ - .uc_rclk = SYSTEM_CLOCK + .uc_rclk = SYSTEM_CLOCK, + .uc_rshift = 0 }; #define SIGCHG(c, i, s, d) \ |
