diff options
author | imp <imp@FreeBSD.org> | 2008-04-13 07:27:37 +0000 |
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committer | imp <imp@FreeBSD.org> | 2008-04-13 07:27:37 +0000 |
commit | 352e51d169c4877beae82a6316142f70d0742025 (patch) | |
tree | afafd1ee9a9f4f112c1ec09045950573a591b1d1 /sys/mips/include/regdef.h | |
parent | 49872b4cfffb3ba15429b1d5c532d570bd29c0a5 (diff) | |
download | FreeBSD-src-352e51d169c4877beae82a6316142f70d0742025.zip FreeBSD-src-352e51d169c4877beae82a6316142f70d0742025.tar.gz |
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
Diffstat (limited to 'sys/mips/include/regdef.h')
-rw-r--r-- | sys/mips/include/regdef.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/sys/mips/include/regdef.h b/sys/mips/include/regdef.h new file mode 100644 index 0000000..bb9eb3d --- /dev/null +++ b/sys/mips/include/regdef.h @@ -0,0 +1,53 @@ +/*- + * Copyright (c) 2001, Juniper Networks, Inc. + * All rights reserved. + * Truman Joe, February 2001. + * + * regdef.h -- MIPS register definitions. + * + * JNPR: regdef.h,v 1.3 2006/08/07 05:38:57 katta + * $FreeBSD$ + */ + +#ifndef _MACHINE_REGDEF_H_ +#define _MACHINE_REGDEF_H_ + +#if defined(__ASSEMBLER__) +/* General purpose CPU register names */ +#define zero $0 /* wired zero */ +#define AT $at /* assembler temp */ +#define v0 $2 /* return value */ +#define v1 $3 +#define a0 $4 /* argument registers */ +#define a1 $5 +#define a2 $6 +#define a3 $7 +#define t0 $8 /* caller saved */ +#define t1 $9 +#define t2 $10 +#define t3 $11 +#define t4 $12 /* caller saved - 32 bit env arg reg 64 bit */ +#define t5 $13 +#define t6 $14 +#define t7 $15 +#define s0 $16 /* callee saved */ +#define s1 $17 +#define s2 $18 +#define s3 $19 +#define s4 $20 +#define s5 $21 +#define s6 $22 +#define s7 $23 +#define t8 $24 /* code generator */ +#define t9 $25 +#define k0 $26 /* kernel temporary */ +#define k1 $27 +#define gp $28 /* global pointer */ +#define sp $29 /* stack pointer */ +#define fp $30 /* frame pointer */ +#define s8 $30 /* callee saved */ +#define ra $31 /* return address */ + +#endif /* __ASSEMBLER__ */ + +#endif /* !_MACHINE_REGDEF_H_ */ |