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author | gonzo <gonzo@FreeBSD.org> | 2009-11-08 07:26:02 +0000 |
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committer | gonzo <gonzo@FreeBSD.org> | 2009-11-08 07:26:02 +0000 |
commit | 9dc0dcde66156da3b54cd4333d0b9cd9d79d5fc6 (patch) | |
tree | 4fc7646799bf3c06d7b1aeb321dfa594aee20229 /sys/mips/atheros/ar71xxreg.h | |
parent | b3356f84e2e566525a11bd93d9091b785ce5753e (diff) | |
download | FreeBSD-src-9dc0dcde66156da3b54cd4333d0b9cd9d79d5fc6.zip FreeBSD-src-9dc0dcde66156da3b54cd4333d0b9cd9d79d5fc6.tar.gz |
- Access to all 5 PHYs goes through registers in MAC0 memory
space, rewrite miibus accessors respectively
Diffstat (limited to 'sys/mips/atheros/ar71xxreg.h')
-rw-r--r-- | sys/mips/atheros/ar71xxreg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sys/mips/atheros/ar71xxreg.h b/sys/mips/atheros/ar71xxreg.h index 3f6b50a..5677a4e 100644 --- a/sys/mips/atheros/ar71xxreg.h +++ b/sys/mips/atheros/ar71xxreg.h @@ -214,6 +214,10 @@ */ #define AR71XX_MAC0_BASE 0x19000000 #define AR71XX_MAC1_BASE 0x1A000000 +/* + * All 5 PHYs accessible only through MAC0 register space + */ +#define AR71XX_MII_BASE 0x19000000 #define AR71XX_MAC_CFG1 0x00 #define MAC_CFG1_SOFT_RESET (1 << 31) |