Don't hardcode the address of the local (S)APIC (aka processor

interrupt block). We use the previously hardcoded address as a
default only, but will otherwise use whatever ACPI tells us.
The address can be found in the MADT table header or in the
LAPIC override table entry.

4 files changed, 33 insertions, 2 deletions

diff --git a/sys/ia64/acpica/madt.c b/sys/ia64/acpica/madt.c
index 50169da..b210633 100644
--- a/sys/ia64/acpica/madt.c
+++ b/sys/ia64/acpica/madt.c
@@ -30,6 +30,8 @@
 
 #include <machine/cpu.h>
 
+extern u_int64_t ia64_lapic_address;
+
 struct sapic *sapic_create(int, int, u_int64_t);
 
 #pragma pack(1)
@@ -71,6 +73,13 @@ typedef struct  /* LOCAL SAPIC */
 	UINT32		FlagsReserved: 31;
 } LOCAL_SAPIC;
 
+typedef struct	/* LOCAL APIC OVERRIDE */
+{
+	APIC_HEADER	Header;
+	UINT16		Reserved;
+	UINT64		LocalApicAddress;
+} LAPIC_OVERRIDE;
+
 typedef struct  /* PLATFORM INTERRUPT SOURCE */
 {
 	APIC_HEADER	Header;
@@ -123,6 +132,15 @@ parse_local_sapic(LOCAL_SAPIC *sapic)
 }
 
 static void
+parse_lapic_override(LAPIC_OVERRIDE *lapic)
+{
+	if (bootverbose)
+		printf("\t\tLocal APIC address=0x%lx\n",
+		    lapic->LocalApicAddress);
+	ia64_lapic_address = lapic->LocalApicAddress;
+}
+
+static void
 parse_platform_interrupt(PLATFORM_INTERRUPT_SOURCE *source)
 {
 	if (bootverbose)
@@ -163,6 +181,12 @@ parse_madt(APIC_TABLE *madt, int countcpus)
 		return (cpus);
 	}
 
+	/* Save the address of the processor interrupt block. */
+	if (bootverbose)
+		printf("\tLocal APIC address=0x%x\n",
+		    madt->LocalApicAddress);
+	ia64_lapic_address = madt->LocalApicAddress;
+
 	for (p = (char *)(madt + 1); p < end; ) {
 		APIC_HEADER *head = (APIC_HEADER *)p;
 
@@ -201,6 +225,7 @@ parse_madt(APIC_TABLE *madt, int countcpus)
 		case APIC_LOCAL_APIC_OVERRIDE:
 			if (bootverbose)
 				printf("Local APIC override entry\n");
+			parse_lapic_override((LAPIC_OVERRIDE*)head);
 			break;
 
 		case APIC_IO_SAPIC:
diff --git a/sys/ia64/ia64/mp_machdep.c b/sys/ia64/ia64/mp_machdep.c
index eca8810..391e350 100644
--- a/sys/ia64/ia64/mp_machdep.c
+++ b/sys/ia64/ia64/mp_machdep.c
@@ -59,6 +59,7 @@
 void ia64_ap_startup(void);
 
 extern vm_offset_t vhpt_base, vhpt_size;
+extern u_int64_t ia64_lapic_address;
 
 #define	LID_SAPIC_ID(x)		((int)((x) >> 24) & 0xff)
 #define	LID_SAPIC_EID(x)	((int)((x) >> 16) & 0xff)
@@ -349,7 +350,7 @@ ipi_send(u_int64_t lid, int ipi)
 	volatile u_int64_t *pipi;
 	u_int64_t vector;
 
-	pipi = ia64_memory_address(PAL_PIB_DEFAULT_ADDR |
+	pipi = ia64_memory_address(ia64_lapic_address |
 	    ((lid & LID_SAPIC_MASK) >> 12));
 	vector = (u_int64_t)(ipi_vector[ipi] & 0xff);
 	CTR3(KTR_SMP, "ipi_send(%p, %ld), cpuid=%d", pipi, vector,
diff --git a/sys/ia64/ia64/sapic.c b/sys/ia64/ia64/sapic.c
index 18a396d..0952da0 100644
--- a/sys/ia64/ia64/sapic.c
+++ b/sys/ia64/ia64/sapic.c
@@ -36,9 +36,12 @@
 #include <machine/sapicreg.h>
 #include <sys/bus.h>
 #include <machine/intr.h>
+#include <machine/pal.h>
 
 static MALLOC_DEFINE(M_SAPIC, "sapic", "I/O SAPIC devices");
 
+u_int64_t ia64_lapic_address = PAL_PIB_DEFAULT_ADDR;
+
 struct sapic_rte {
 	u_int64_t	rte_vector		:8;
 	u_int64_t	rte_delivery_mode	:3;
diff --git a/sys/ia64/include/intr.h b/sys/ia64/include/intr.h
index 1519183..90e0974 100644
--- a/sys/ia64/include/intr.h
+++ b/sys/ia64/include/intr.h
@@ -43,8 +43,10 @@ struct ia64_interrupt_block
 	u_int8_t	ib_reserved4[0x1fff0];
 };
 
+extern u_int64_t ia64_lapic_address;
+
 #define IA64_INTERRUPT_BLOCK	\
-	(struct ia64_interrupt_block *)IA64_PHYS_TO_RR6(0xfee00000)
+	(struct ia64_interrupt_block *)IA64_PHYS_TO_RR6(ia64_lapic_address)
 
 struct sapic;