Update to SDM 2.2:

o  Add tf (test feature) instruction,
o  Add vmsw (VM switch) instruction.

While here, update copyright.

MFC after: 1 week

5 files changed, 124 insertions, 24 deletions

diff --git a/sys/ia64/disasm/disasm.h b/sys/ia64/disasm/disasm.h
index 1b24cb3..7f4498a 100644
--- a/sys/ia64/disasm/disasm.h
+++ b/sys/ia64/disasm/disasm.h
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
+ * Copyright (c) 2000-2006 Marcel Moolenaar
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -110,6 +110,7 @@ enum asm_cmpltr_class {
 	ASM_CC_RW,
 	ASM_CC_TREL, ASM_CC_TRUNC,
 	ASM_CC_UNIT, ASM_CC_UNPACK, ASM_CC_UNS,
+	ASM_CC_VMSW,
 	ASM_CC_XMA
 };
 
@@ -212,7 +213,7 @@ enum asm_fmt {
 	ASM_FMT_I17, ASM_FMT_I18, ASM_FMT_I19, ASM_FMT_I20,
 	ASM_FMT_I21, ASM_FMT_I22, ASM_FMT_I23, ASM_FMT_I24,
 	ASM_FMT_I25, ASM_FMT_I26, ASM_FMT_I27, ASM_FMT_I28,
-	ASM_FMT_I29,
+	ASM_FMT_I29, ASM_FMT_I30,
 	ASM_FMT_M = 0x0500,
 	ASM_FMT_M1,  ASM_FMT_M2,  ASM_FMT_M3,  ASM_FMT_M4,
 	ASM_FMT_M5,  ASM_FMT_M6,  ASM_FMT_M7,  ASM_FMT_M8,
@@ -274,9 +275,10 @@ enum asm_op {
 	ASM_OP_ST2, ASM_OP_ST4, ASM_OP_ST8, ASM_OP_STF, ASM_OP_STF8,
 	ASM_OP_STFD, ASM_OP_STFE, ASM_OP_STFS, ASM_OP_SUB, ASM_OP_SUM,
 	ASM_OP_SXT1, ASM_OP_SXT2, ASM_OP_SXT4, ASM_OP_SYNC,
-	ASM_OP_TAK, ASM_OP_TBIT, ASM_OP_THASH, ASM_OP_TNAT, ASM_OP_TPA,
-	ASM_OP_TTAG,
+	ASM_OP_TAK, ASM_OP_TBIT, ASM_OP_TF, ASM_OP_THASH, ASM_OP_TNAT,
+	ASM_OP_TPA, ASM_OP_TTAG,
 	ASM_OP_UNPACK1, ASM_OP_UNPACK2, ASM_OP_UNPACK4,
+	ASM_OP_VMSW,
 	ASM_OP_XCHG1, ASM_OP_XCHG2, ASM_OP_XCHG4, ASM_OP_XCHG8, ASM_OP_XMA,
 	ASM_OP_XOR,
 	ASM_OP_ZXT1, ASM_OP_ZXT2, ASM_OP_ZXT4,
diff --git a/sys/ia64/disasm/disasm_decode.c b/sys/ia64/disasm/disasm_decode.c
index f6e0768..0359e44 100644
--- a/sys/ia64/disasm/disasm_decode.c
+++ b/sys/ia64/disasm/disasm_decode.c
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
+ * Copyright (c) 2000-2006 Marcel Moolenaar
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -567,6 +567,12 @@ asm_decodeB(uint64_t ip, struct asm_bundle *b, int slot)
 		case 0x10:
 			op = ASM_OP_EPC, fmt = ASM_FMT_B8;
 			break;
+		case 0x18:
+			op = ASM_OP_VMSW_0, fmt = ASM_FMT_B8;
+			break;
+		case 0x19:
+			op = ASM_OP_VMSW_1, fmt = ASM_FMT_B8;
+			break;
 		case 0x20:
 			switch (FIELD(bits, 6, 3)) { /* btype */
 			case 0x0:
@@ -1000,11 +1006,20 @@ asm_decodeI(uint64_t ip, struct asm_bundle *b, int slot)
 					    fmt = ASM_FMT_I16;
 					break;
 				case 0x2:
-					op = ASM_OP_TNAT_Z, fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_Z,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_Z,
+						    fmt = ASM_FMT_I30;
 					break;
 				case 0x3:
-					op = ASM_OP_TNAT_Z_UNC,
-					    fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_Z_UNC,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_Z_UNC,
+						    fmt = ASM_FMT_I30;
 					break;
 				}
 			} else {
@@ -1018,12 +1033,20 @@ asm_decodeI(uint64_t ip, struct asm_bundle *b, int slot)
 					    fmt = ASM_FMT_I16;
 					break;
 				case 0x2:
-					op = ASM_OP_TNAT_Z_AND,
-					    fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_Z_AND,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_Z_AND,
+						    fmt = ASM_FMT_I30;
 					break;
 				case 0x3:
-					op = ASM_OP_TNAT_NZ_AND,
-					    fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_NZ_AND,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_NZ_AND,
+						    fmt = ASM_FMT_I30;
 					break;
 				}
 			}
@@ -1040,12 +1063,20 @@ asm_decodeI(uint64_t ip, struct asm_bundle *b, int slot)
 					    fmt = ASM_FMT_I16;
 					break;
 				case 0x2:
-					op = ASM_OP_TNAT_Z_OR,
-					    fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_Z_OR,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_Z_OR,
+						    fmt = ASM_FMT_I30;
 					break;
 				case 0x3:
-					op = ASM_OP_TNAT_NZ_OR,
-					    fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_NZ_OR,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_NZ_OR,
+						    fmt = ASM_FMT_I30;
 					break;
 				}
 			} else {
@@ -1059,12 +1090,20 @@ asm_decodeI(uint64_t ip, struct asm_bundle *b, int slot)
 					    fmt = ASM_FMT_I16;
 					break;
 				case 0x2:
-					op = ASM_OP_TNAT_Z_OR_ANDCM,
-					    fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_Z_OR_ANDCM,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_Z_OR_ANDCM,
+						    fmt = ASM_FMT_I30;
 					break;
 				case 0x3:
-					op = ASM_OP_TNAT_NZ_OR_ANDCM,
-					    fmt = ASM_FMT_I17;
+					if (FIELD(bits, 19, 1) == 0) /* x */
+						op = ASM_OP_TNAT_NZ_OR_ANDCM,
+						    fmt = ASM_FMT_I17;
+					else
+						op = ASM_OP_TF_NZ_OR_ANDCM,
+						    fmt = ASM_FMT_I30;
 					break;
 				}
 			}
diff --git a/sys/ia64/disasm/disasm_extract.c b/sys/ia64/disasm/disasm_extract.c
index 61604f9..1cec07e 100644
--- a/sys/ia64/disasm/disasm_extract.c
+++ b/sys/ia64/disasm/disasm_extract.c
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
+ * Copyright (c) 2000-2006 Marcel Moolenaar
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -1660,6 +1660,46 @@ asm_normalize(struct asm_inst *i, enum asm_op op)
 		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
 		op = ASM_OP_TBIT;
 		break;
+	case ASM_OP_TF_NZ_AND:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
+		op = ASM_OP_TF;
+		break;
+	case ASM_OP_TF_NZ_OR:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
+		op = ASM_OP_TF;
+		break;
+	case ASM_OP_TF_NZ_OR_ANDCM:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
+		op = ASM_OP_TF;
+		break;
+	case ASM_OP_TF_Z:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
+		op = ASM_OP_TF;
+		break;
+	case ASM_OP_TF_Z_AND:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
+		op = ASM_OP_TF;
+		break;
+	case ASM_OP_TF_Z_OR:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
+		op = ASM_OP_TF;
+		break;
+	case ASM_OP_TF_Z_OR_ANDCM:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
+		op = ASM_OP_TF;
+		break;
+	case ASM_OP_TF_Z_UNC:
+		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
+		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
+		op = ASM_OP_TF;
+		break;
 	case ASM_OP_TNAT_NZ_AND:
 		asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
 		asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
@@ -1724,6 +1764,14 @@ asm_normalize(struct asm_inst *i, enum asm_op op)
 		asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
 		op = ASM_OP_UNPACK4;
 		break;
+	case ASM_OP_VMSW_0:
+		asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_0);
+		op = ASM_OP_VMSW;
+		break;
+	case ASM_OP_VMSW_1:
+		asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_1);
+		op = ASM_OP_VMSW;
+		break;
 	case ASM_OP_XMA_H:
 		asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_H);
 		op = ASM_OP_XMA;
@@ -2244,6 +2292,12 @@ asm_extract(enum asm_op op, enum asm_fmt fmt, uint64_t bits,
 		operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
 		operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
 		break;
+	case ASM_FMT_I30: /* 2 dst */
+		operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
+		operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
+		op_imm(i, 3, 32LL + FIELD(bits, 14, 5));
+		i->i_srcidx++;
+		break;
 	case ASM_FMT_M1:
 		asm_hint(i, ASM_CC_LDHINT);
 		operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
diff --git a/sys/ia64/disasm/disasm_format.c b/sys/ia64/disasm/disasm_format.c
index 812eb70..37a3650 100644
--- a/sys/ia64/disasm/disasm_format.c
+++ b/sys/ia64/disasm/disasm_format.c
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
+ * Copyright (c) 2000-2006 Marcel Moolenaar
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -67,8 +67,9 @@ static const char *asm_mnemonics[] = {
 	"setf", "shl", "shladd", "shladdp4", "shr", "shrp", "srlz", "ssm",
 	"st1", "st16", "st2", "st4", "st8", "stf", "stf8", "stfd", "stfe",
 	"stfs", "sub", "sum", "sxt1", "sxt2", "sxt4", "sync",
-	"tak", "tbit", "thash", "tnat", "tpa", "ttag",
+	"tak", "tbit", "tf", "thash", "tnat", "tpa", "ttag",
 	"unpack1", "unpack2", "unpack4",
+	"vmsw",
 	"xchg1", "xchg2", "xchg4", "xchg8", "xma", "xor",
 	"zxt1", "zxt2", "zxt4"
 };
diff --git a/sys/ia64/disasm/disasm_int.h b/sys/ia64/disasm/disasm_int.h
index 911bd54..e1410c1 100644
--- a/sys/ia64/disasm/disasm_int.h
+++ b/sys/ia64/disasm/disasm_int.h
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
+ * Copyright (c) 2000-2006 Marcel Moolenaar
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -206,12 +206,16 @@
 	ASM_OP_TBIT_NZ_AND, ASM_OP_TBIT_NZ_OR, ASM_OP_TBIT_NZ_OR_ANDCM,	\
 	ASM_OP_TBIT_Z, ASM_OP_TBIT_Z_AND, ASM_OP_TBIT_Z_OR,		\
 	ASM_OP_TBIT_Z_OR_ANDCM, ASM_OP_TBIT_Z_UNC,			\
+	ASM_OP_TF_NZ_AND, ASM_OP_TF_NZ_OR, ASM_OP_TF_NZ_OR_ANDCM,	\
+	ASM_OP_TF_Z, ASM_OP_TF_Z_AND, ASM_OP_TF_Z_OR,			\
+	ASM_OP_TF_Z_OR_ANDCM, ASM_OP_TF_Z_UNC,				\
 	ASM_OP_TNAT_NZ_AND, ASM_OP_TNAT_NZ_OR, ASM_OP_TNAT_NZ_OR_ANDCM,	\
 	ASM_OP_TNAT_Z, ASM_OP_TNAT_Z_AND, ASM_OP_TNAT_Z_OR,		\
 	ASM_OP_TNAT_Z_OR_ANDCM, ASM_OP_TNAT_Z_UNC,			\
 	ASM_OP_UNPACK1_H, ASM_OP_UNPACK1_L,				\
 	ASM_OP_UNPACK2_H, ASM_OP_UNPACK2_L,				\
 	ASM_OP_UNPACK4_H, ASM_OP_UNPACK4_L,				\
+	ASM_OP_VMSW_0, ASM_OP_VMSW_1,					\
 	ASM_OP_XMA_H, ASM_OP_XMA_HU, ASM_OP_XMA_L,			\
 	ASM_OP_NUMBER_OF_OPCODES