Since we are quite unlikely to ever face another platform which

uses the i8237 without trying to emulate the PC architecture move
the register definitions for the i8237 chip into the central include
file for the chip, except for the PC98 case which is magic.

Add new isa_dmatc() function which tells us as cheaply as possible
if the terminal count has been reached for a given channel.

1 files changed, 13 insertions, 18 deletions

diff --git a/sys/ia64/isa/isa_dma.c b/sys/ia64/isa/isa_dma.c
index 08ead75..fb7b83c 100644
--- a/sys/ia64/isa/isa_dma.c
+++ b/sys/ia64/isa/isa_dma.c
@@ -58,24 +58,6 @@
 #include <dev/ic/i8237.h>
 #include <machine/bus.h>
 
-/*
-**  Register definitions for DMA controller 1 (channels 0..3):
-*/
-#define	DMA1_CHN(c)	(IO_DMA1 + 1*(2*(c)))	/* addr reg for channel c */
-#define	DMA1_SMSK	(IO_DMA1 + 1*10)	/* single mask register */
-#define	DMA1_MODE	(IO_DMA1 + 1*11)	/* mode register */
-#define	DMA1_FFC	(IO_DMA1 + 1*12)	/* clear first/last FF */
-#define	DMA1_RESET	(IO_DMA1 + 1*13)	/* reset */
-
-/*
-**  Register definitions for DMA controller 2 (channels 4..7):
-*/
-#define	DMA2_CHN(c)	(IO_DMA2 + 2*(2*(c)))	/* addr reg for channel c */
-#define	DMA2_SMSK	(IO_DMA2 + 2*10)	/* single mask register */
-#define	DMA2_MODE	(IO_DMA2 + 2*11)	/* mode register */
-#define	DMA2_FFC	(IO_DMA2 + 2*12)	/* clear first/last FF */
-#define	DMA2_RESET	(IO_DMA2 + 2*13)	/* reset */
-
 static bus_dma_tag_t dma_tag[8];
 static bus_dmamap_t dma_map[8];
 static u_int8_t	dma_busy = 0;		/* Used in isa_dmastart() */
@@ -490,6 +472,19 @@ isa_dmastatus(int chan)
 }
 
 /*
+ * Reached terminal count yet ?
+ */
+int
+isa_dmatc(int chan)
+{
+
+	if (chan < 4)
+		return(inb(DMA1_STATUS) & (1 << chan));
+	else
+		return(inb(DMA2_STATUS) & (1 << (chan & 3)));
+}
+
+/*
  * Stop a DMA transfer currently in progress.
  */
 int