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authormarcel <marcel@FreeBSD.org>2010-03-17 00:37:15 +0000
committermarcel <marcel@FreeBSD.org>2010-03-17 00:37:15 +0000
commita16f0fefdce804c5d60c0aea44277f2cb95d3751 (patch)
tree23d71a6afc74f7cdf6522ea5d3b42da8cb8da732 /sys/ia64/include
parent2dfc25c8f6e619ae6f2fa6a28450a37450fea036 (diff)
downloadFreeBSD-src-a16f0fefdce804c5d60c0aea44277f2cb95d3751.zip
FreeBSD-src-a16f0fefdce804c5d60c0aea44277f2cb95d3751.tar.gz
Revamp the interrupt code based on the previous commit:
o Introduce XIV, eXternal Interrupt Vector, to differentiate from the interrupts vectors that are offsets in the IVT (Interrupt Vector Table). There's a vector for external interrupts, which are based on the XIVs. o Keep track of allocated and reserved XIVs so that we can assign XIVs without hardcoding anything. When XIVs are allocated, an interrupt handler and a class is specified for the XIV. Classes are: 1. architecture-defined: XIV 15 is returned when no external interrupt are pending, 2. platform-defined: SAL reports which XIV is used to wakeup an AP (typically 0xFF, but it's 0x12 for the Altix 350). 3. inter-processor interrupts: allocated for SMP support and non-redirectable. 4. device interrupts (i.e. IRQs): allocated when devices are discovered and are redirectable. o Rewrite the central interrupt handler to call the per-XIV interrupt handler and rename it to ia64_handle_intr(). Move the per-XIV handler implementation to the file where we have the XIV allocation/reservation. Clock interrupt handling is moved to clock.c. IPI handling is moved to mp_machdep.c. o Drop support for the Intel 8259A because it was broken. When XIV 0 is received, the CPU should initiate an INTA cycle to obtain the interrupt vector of the 8259-based interrupt. In these cases the interrupt controller we should be talking to WRT to masking on signalling EOI is the 8259 and not the I/O SAPIC. This requires adriver for the Intel 8259A which isn't available for ia64. Thus stop pretending to support ExtINTs and instead panic() so that if we come across hardware that has an Intel 8259A, so have something real to work with. o With XIVs for IPIs dynamically allocatedi and also based on priority, define the IPI_* symbols as variables rather than constants. The variable holds the XIV allocated for the IPI. o IPI_STOP_HARD delivers a NMI if possible. Otherwise the XIV assigned to IPI_STOP is delivered.
Diffstat (limited to 'sys/ia64/include')
-rw-r--r--sys/ia64/include/clock.h8
-rw-r--r--sys/ia64/include/intr.h23
-rw-r--r--sys/ia64/include/intrcnt.h6
-rw-r--r--sys/ia64/include/smp.h32
4 files changed, 36 insertions, 33 deletions
diff --git a/sys/ia64/include/clock.h b/sys/ia64/include/clock.h
index 772fc2a..6b87a89 100644
--- a/sys/ia64/include/clock.h
+++ b/sys/ia64/include/clock.h
@@ -9,12 +9,4 @@
#ifndef _MACHINE_CLOCK_H_
#define _MACHINE_CLOCK_H_
-#ifdef _KERNEL
-
-#define CLOCK_VECTOR 254
-
-extern uint64_t ia64_clock_reload;
-
-#endif
-
#endif /* !_MACHINE_CLOCK_H_ */
diff --git a/sys/ia64/include/intr.h b/sys/ia64/include/intr.h
index 0635e34..b26190c 100644
--- a/sys/ia64/include/intr.h
+++ b/sys/ia64/include/intr.h
@@ -30,7 +30,14 @@
#ifndef _MACHINE_INTR_H_
#define _MACHINE_INTR_H_
+#define IA64_NXIVS 256 /* External Interrupt Vectors */
+#define IA64_MIN_XIV 16
+
+#define IA64_MAX_HWPRIO 14
+
struct sapic;
+struct thread;
+struct trapframe;
/*
* Layout of the Processor Interrupt Block.
@@ -46,12 +53,28 @@ struct ia64_pib
uint8_t _rsvd4[0x1fff0];
};
+enum ia64_xiv_use {
+ IA64_XIV_FREE,
+ IA64_XIV_ARCH, /* Architecturally defined. */
+ IA64_XIV_PLAT, /* Platform defined. */
+ IA64_XIV_IPI, /* Used for IPIs. */
+ IA64_XIV_IRQ /* Used for external interrupts. */
+};
+
+typedef u_int (ia64_ihtype)(struct thread *, u_int, struct trapframe *);
+
extern struct ia64_pib *ia64_pib;
+void ia64_handle_intr(struct trapframe *);
int ia64_setup_intr(const char *, int, driver_filter_t, driver_intr_t,
void *, enum intr_type, void **);
int ia64_teardown_intr(void *);
+void ia64_xiv_init(void);
+u_int ia64_xiv_alloc(u_int, enum ia64_xiv_use, ia64_ihtype);
+int ia64_xiv_free(u_int, enum ia64_xiv_use);
+int ia64_xiv_reserve(u_int, enum ia64_xiv_use, ia64_ihtype);
+
int sapic_config_intr(u_int, enum intr_trigger, enum intr_polarity);
struct sapic *sapic_create(u_int, u_int, uint64_t);
int sapic_enable(struct sapic *, u_int, u_int);
diff --git a/sys/ia64/include/intrcnt.h b/sys/ia64/include/intrcnt.h
index c4f73c0..5e165ea 100644
--- a/sys/ia64/include/intrcnt.h
+++ b/sys/ia64/include/intrcnt.h
@@ -29,11 +29,7 @@
*/
#define INTRCNT_CLOCK 0
-#define INTRCNT_ISA_IRQ (INTRCNT_CLOCK + 1)
-#define INTRCNT_ISA_IRQ_LEN 16
-#define INTRCNT_OTHER_BASE (INTRCNT_ISA_IRQ + INTRCNT_ISA_IRQ_LEN)
-#define INTRCNT_OTHER_LEN 240
-#define INTRCNT_COUNT (INTRCNT_OTHER_BASE + INTRCNT_OTHER_LEN)
+#define INTRCNT_COUNT 256
/*
* Maximum name length in intrnames table (including terminating '\0'.
diff --git a/sys/ia64/include/smp.h b/sys/ia64/include/smp.h
index 4eddf74..9f976de 100644
--- a/sys/ia64/include/smp.h
+++ b/sys/ia64/include/smp.h
@@ -6,31 +6,23 @@
#ifdef _KERNEL
-/*
- * Interprocessor interrupts for SMP. The following values are indices
- * into the IPI vector table. The SAL gives us the vector used for AP
- * wake-up. We base the other vectors on that. Keep IPI_AP_WAKEUP at
- * index 0. See sal.c for details.
- */
-/* Architecture specific IPIs. */
-#define IPI_AP_WAKEUP 0
-#define IPI_HIGH_FP 1
-#define IPI_MCA_CMCV 2
-#define IPI_MCA_RENDEZ 3
-/* Machine independent IPIs. */
-#define IPI_AST 4
-#define IPI_RENDEZVOUS 5
-#define IPI_STOP 6
-#define IPI_STOP_HARD 6
-#define IPI_PREEMPT 7
-
-#define IPI_COUNT 8
+#define IPI_AST ia64_ipi_ast
+#define IPI_PREEMPT ia64_ipi_preempt
+#define IPI_RENDEZVOUS ia64_ipi_rndzvs
+#define IPI_STOP ia64_ipi_stop
+#define IPI_STOP_HARD ia64_ipi_nmi
#ifndef LOCORE
struct pcpu;
-extern int ipi_vector[];
+extern int ia64_ipi_ast;
+extern int ia64_ipi_highfp;
+extern int ia64_ipi_nmi;
+extern int ia64_ipi_preempt;
+extern int ia64_ipi_rndzvs;
+extern int ia64_ipi_stop;
+extern int ia64_ipi_wakeup;
void ipi_all_but_self(int ipi);
void ipi_selected(cpumask_t cpus, int ipi);
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