Further enhance the handling of misaligned loads and stores:

o  implement double-extended and single precision loads and stores,
o  implement double precision stores,
o  replace the machdep.unaligned_print sysctl with debug.unaligned_print
   and change the default value to 0,
o  replace the machdep.unaligned_sigbus sysctl with debug.unaligned_test,
o  Remmove the fillfd() function. The function is trvial enough for
   inline assembly.

The debug.unaligned_test sysctl is used to test the emulation of
misaligned loads and stores. When PSR.ac is 0, the CPU will handle
misaligned memory accesses itselfi and we don't get an exception
for it. When PSR.ac is 1, the process needs to be signalled and we
should not emulate. The sysctl takes effect when PSR.ac is 1 and
tells us that we should emulate and not send a signal.

PR: 72268
MFC after: 1 week

1 files changed, 0 insertions, 1 deletions

diff --git a/sys/ia64/include/md_var.h b/sys/ia64/include/md_var.h
index d1515fe..437c2ce 100644
--- a/sys/ia64/include/md_var.h
+++ b/sys/ia64/include/md_var.h
@@ -88,7 +88,6 @@ void	map_gateway_page(void);
 void	map_pal_code(void);
 void	os_boot_rendez(void);
 void	os_mca(void);
-void	spillfd(void *src, void *dst);
 int	syscall(struct trapframe *);
 void	trap(int, struct trapframe *);
 void	trap_panic(int, struct trapframe *);