diff options
| author | peter <peter@FreeBSD.org> | 2002-01-16 00:44:29 +0000 |
|---|---|---|
| committer | peter <peter@FreeBSD.org> | 2002-01-16 00:44:29 +0000 |
| commit | 482430bcf0f1253994126dbfa77f1fe8c5726705 (patch) | |
| tree | 8d3c4f75be1aacbc0a66c7602b21b6936a70ef9a /sys/i386 | |
| parent | f71468f39bb7c66ce628f2a2906227d37d28308b (diff) | |
| download | FreeBSD-src-482430bcf0f1253994126dbfa77f1fe8c5726705.zip FreeBSD-src-482430bcf0f1253994126dbfa77f1fe8c5726705.tar.gz | |
Ensure that we set all the %cr0 bits to a known state for the AP's before
they make it through to userland. This should fix the p5-smp problem
without affecting the other cpus (eg: cyrix, see initcpu.c and the special
cache handling for these cpu types).
Diffstat (limited to 'sys/i386')
| -rw-r--r-- | sys/i386/i386/mp_machdep.c | 10 | ||||
| -rw-r--r-- | sys/i386/i386/mptable.c | 10 | ||||
| -rw-r--r-- | sys/i386/include/mptable.h | 10 |
3 files changed, 30 insertions, 0 deletions
diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c index f4f9c52..9b52fb1 100644 --- a/sys/i386/i386/mp_machdep.c +++ b/sys/i386/i386/mp_machdep.c @@ -467,6 +467,7 @@ init_secondary(void) { int gsel_tss; int x, myid = bootAP; + u_int cr0; gdt_segs[GPRIV_SEL].ssd_base = (int) &SMP_prvspace[myid]; gdt_segs[GPROC0_SEL].ssd_base = @@ -496,6 +497,15 @@ init_secondary(void) PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); ltr(gsel_tss); + /* + * Set to a known state: + * Set by mpboot.s: CR0_PG, CR0_PE + * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM + */ + cr0 = rcr0(); + cr0 &= ~(CR0_CD | CR0_NW | CR0_EM); + load_cr0(cr0); + pmap_set_opt(); } diff --git a/sys/i386/i386/mptable.c b/sys/i386/i386/mptable.c index f4f9c52..9b52fb1 100644 --- a/sys/i386/i386/mptable.c +++ b/sys/i386/i386/mptable.c @@ -467,6 +467,7 @@ init_secondary(void) { int gsel_tss; int x, myid = bootAP; + u_int cr0; gdt_segs[GPRIV_SEL].ssd_base = (int) &SMP_prvspace[myid]; gdt_segs[GPROC0_SEL].ssd_base = @@ -496,6 +497,15 @@ init_secondary(void) PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); ltr(gsel_tss); + /* + * Set to a known state: + * Set by mpboot.s: CR0_PG, CR0_PE + * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM + */ + cr0 = rcr0(); + cr0 &= ~(CR0_CD | CR0_NW | CR0_EM); + load_cr0(cr0); + pmap_set_opt(); } diff --git a/sys/i386/include/mptable.h b/sys/i386/include/mptable.h index f4f9c52..9b52fb1 100644 --- a/sys/i386/include/mptable.h +++ b/sys/i386/include/mptable.h @@ -467,6 +467,7 @@ init_secondary(void) { int gsel_tss; int x, myid = bootAP; + u_int cr0; gdt_segs[GPRIV_SEL].ssd_base = (int) &SMP_prvspace[myid]; gdt_segs[GPROC0_SEL].ssd_base = @@ -496,6 +497,15 @@ init_secondary(void) PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); ltr(gsel_tss); + /* + * Set to a known state: + * Set by mpboot.s: CR0_PG, CR0_PE + * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM + */ + cr0 = rcr0(); + cr0 &= ~(CR0_CD | CR0_NW | CR0_EM); + load_cr0(cr0); + pmap_set_opt(); } |
