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| author | davidxu <davidxu@FreeBSD.org> | 2006-05-30 23:44:21 +0000 |
|---|---|---|
| committer | davidxu <davidxu@FreeBSD.org> | 2006-05-30 23:44:21 +0000 |
| commit | fa9df4abe12110a487787e1d598d0c05af348a13 (patch) | |
| tree | 8fe4415c7c155100ca395c3fcc5aca0e656c49c0 /sys/i386/isa/npx.c | |
| parent | e96ef6e51ce2eada4161f8c46c031c67179ff703 (diff) | |
| download | FreeBSD-src-fa9df4abe12110a487787e1d598d0c05af348a13.zip FreeBSD-src-fa9df4abe12110a487787e1d598d0c05af348a13.tar.gz | |
Use the method described in IA-32 Intel Architecture Software Developer's
Manual chapter 11.6.6 to get valid mxcsr bits, use the mxcsr mask to clear
invalid bits passed by user code.
Reviewed by: bde
Diffstat (limited to 'sys/i386/isa/npx.c')
| -rw-r--r-- | sys/i386/isa/npx.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/sys/i386/isa/npx.c b/sys/i386/isa/npx.c index bc39629..ba202fc 100644 --- a/sys/i386/isa/npx.c +++ b/sys/i386/isa/npx.c @@ -417,6 +417,15 @@ npx_attach(dev) stop_emulating(); fpusave(&npx_cleanstate); start_emulating(); +#ifdef CPU_ENABLE_SSE + if (cpu_fxsr) { + if (npx_cleanstate.sv_xmm.sv_env.en_mxcsr_mask) + cpu_mxcsr_mask = + npx_cleanstate.sv_xmm.sv_env.en_mxcsr_mask; + else + cpu_mxcsr_mask = 0xFFBF; + } +#endif npx_cleanstate_ready = 1; intr_restore(s); } |
