Commit Bosko's patch to clean up the PSE/PG_G initialization to and

avoid problems with some Pentium 4 cpus and some older PPro/Pentium2
cpus.  There are several problems, some documented in Intel errata.
This patch:
1) moves the kernel to the second page in the PSE case.  There is an
errata that says that you Must Not point a 4MB page at physical
address zero on older cpus.  We avoided bugs here due to sheer luck.
2) sets up PSE page tables right from the start in locore, rather than
trying to switch from 4K to 4M (or 2M) pages part way through the boot
sequence at the same time that we're messing with PG_G.

For some reason, the pmap work over the last 18 months seems to tickle
the problems, and the PAE infrastructure changes disturb the cpu
bugs even more.

A couple of people have reported a problem with APM bios calls during
boot.  I'll work with people to get this resolved.

Obtained from:	bmilekic

3 files changed, 12 insertions, 9 deletions

diff --git a/sys/i386/include/mptable.h b/sys/i386/include/mptable.h
index a050d3c..fe150ff 100644
--- a/sys/i386/include/mptable.h
+++ b/sys/i386/include/mptable.h
@@ -536,8 +536,6 @@ init_secondary(void)
 	cr0 = rcr0();
 	cr0 &= ~(CR0_CD | CR0_NW | CR0_EM);
 	load_cr0(cr0);
-
-	pmap_set_opt();
 }
 
 
@@ -926,7 +924,6 @@ mptable_pass2(void)
 	int     type;
 	int     apic, bus, cpu, intr;
 	int	i, j;
-	int	pgeflag;
 
 	POSTCODE(MPTABLE_PASS2_POST);
 
@@ -935,8 +932,6 @@ mptable_pass2(void)
 	proc.type = 0;
 	proc.cpu_flags = PROCENTRY_FLAG_EN;
 
-	pgeflag = 0;		/* XXX - Not used under SMP yet.  */
-
 	MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics,
 	    M_DEVBUF, M_WAITOK);
 	MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics,
@@ -961,7 +956,7 @@ mptable_pass2(void)
 			/* use this slot if available */
 			if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) {
 				SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW |
-				    pgeflag | (io_apic_address[i] & PG_FRAME));
+				    (io_apic_address[i] & PG_FRAME));
 				ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace
 					+ (NPTEPG-2-j) * PAGE_SIZE
 					+ (io_apic_address[i] & PAGE_MASK));
@@ -2177,7 +2172,6 @@ start_all_aps(u_int boot_addr)
 
 	for (x = 0; x < NKPT; x++)
 		PTD[x] = 0;
-	pmap_set_opt();
 
 	/* number of APs actually started */
 	return mp_ncpus - 1;
@@ -2285,7 +2279,7 @@ start_ap(int logical_cpu, u_int boot_addr)
 	/* setup common fields for subsequent IPIs */
 	icr_lo = lapic.icr_lo & APIC_ICRLO_RESV_MASK;
 	icr_lo |= APIC_DESTMODE_PHY;
-	
+
 	/* do an INIT IPI: assert RESET */
 	lapic.icr_lo = icr_lo | APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE |
 	    APIC_LEVEL_ASSERT | APIC_DELMODE_INIT;
diff --git a/sys/i386/include/pmap.h b/sys/i386/include/pmap.h
index 3437a8c..62afddb 100644
--- a/sys/i386/include/pmap.h
+++ b/sys/i386/include/pmap.h
@@ -330,6 +330,8 @@ extern vm_paddr_t avail_start;
 extern vm_offset_t clean_eva;
 extern vm_offset_t clean_sva;
 extern vm_paddr_t phys_avail[];
+extern int pseflag;
+extern int pgeflag;
 extern char *ptvmmap;		/* poor name! */
 extern vm_offset_t virtual_avail;
 extern vm_offset_t virtual_end;
@@ -340,7 +342,7 @@ void	pmap_kremove(vm_offset_t);
 void	*pmap_mapdev(vm_paddr_t, vm_size_t);
 void	pmap_unmapdev(vm_offset_t, vm_size_t);
 pt_entry_t *pmap_pte_quick(pmap_t, vm_offset_t) __pure2;
-void	pmap_set_opt(void);
+void	pmap_set_pg(void);
 void	pmap_invalidate_page(pmap_t, vm_offset_t);
 void	pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t);
 void	pmap_invalidate_all(pmap_t);
diff --git a/sys/i386/include/vmparam.h b/sys/i386/include/vmparam.h
index 9465890..5943e76 100644
--- a/sys/i386/include/vmparam.h
+++ b/sys/i386/include/vmparam.h
@@ -84,6 +84,13 @@
 
 
 /*
+ * Kernel physical load address.
+ */
+#ifndef KERNLOAD
+#define	KERNLOAD		(1 << PDRSHIFT)
+#endif
+
+/*
  * Virtual addresses of things.  Derived from the page directory and
  * page table indexes from pmap.h for precision.
  * Because of the page that is both a PD and PT, it looks a little