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author | jhb <jhb@FreeBSD.org> | 2003-11-03 21:53:38 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2003-11-03 21:53:38 +0000 |
commit | dcec7e1907fe867da713052f8c91d79bbfe68000 (patch) | |
tree | c7dc6abe8f136cde7b0dbbc6ce1152f91bb42ad1 /sys/i386/include/pcpu.h | |
parent | aac4b7181cbed34861c76ff9d9142c7fdf212008 (diff) | |
download | FreeBSD-src-dcec7e1907fe867da713052f8c91d79bbfe68000.zip FreeBSD-src-dcec7e1907fe867da713052f8c91d79bbfe68000.tar.gz |
New APIC support code:
- The apic interrupt entry points have been rewritten so that each entry
point can serve 32 different vectors. When the entry is executed, it
uses one of the 32-bit ISR registers to determine which vector in its
assigned range was triggered. Thus, the apic code can support 159
different interrupt vectors with only 5 entry points.
- We now always to disable the local APIC to work around an errata in
certain PPros and then re-enable it again if we decide to use the APICs
to route interrupts.
- We no longer map IO APICs or local APICs using special page table
entries. Instead, we just use pmap_mapdev(). We also no longer
export the virtual address of the local APIC as a global symbol to
the rest of the system, but only in local_apic.c. To aid this, the
APIC ID of each CPU is exported as a per-CPU variable.
- Interrupt sources are provided for each intpin on each IO APIC.
Currently, each source is given a unique interrupt vector meaning that
PCI interrupts are not shared on most machines with an I/O APIC.
That mapping for interrupt sources to interrupt vectors is up to the
APIC enumerator driver however.
- We no longer probe to see if we need to use mixed mode to route IRQ 0,
instead we always use mixed mode to route IRQ 0 for now. This can be
disabled via the 'NO_MIXED_MODE' kernel option.
- The npx(4) driver now always probes to see if a built-in FPU is present
since this test can now be performed with the new APIC code. However,
an SMP kernel will panic if there is more than one CPU and a built-in
FPU is not found.
- PCI interrupts are now properly routed when using APICs to route
interrupts, so remove the hack to psuedo-route interrupts when the
intpin register was read.
- The apic.h header was moved to apicreg.h and a new apicvar.h header
that declares the APIs used by the new APIC code was added.
Diffstat (limited to 'sys/i386/include/pcpu.h')
-rw-r--r-- | sys/i386/include/pcpu.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/sys/i386/include/pcpu.h b/sys/i386/include/pcpu.h index a7b5c22..458c767 100644 --- a/sys/i386/include/pcpu.h +++ b/sys/i386/include/pcpu.h @@ -48,10 +48,8 @@ struct segment_descriptor pc_common_tssd; \ struct segment_descriptor *pc_tss_gdt; \ int pc_currentldt; \ - u_int32_t pc_int_pending; /* master int pending flag */ \ - u_int32_t pc_ipending; /* pending slow interrupts */ \ - u_int32_t pc_fpending; /* pending fast interrupts */ \ - u_int32_t pc_spending /* pending soft interrupts */ + u_int pc_acpi_id; \ + u_int pc_apic_id; #if defined(lint) |