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author | jhb <jhb@FreeBSD.org> | 2014-11-02 22:58:30 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2014-11-02 22:58:30 +0000 |
commit | fdfced8ce850bbda17da9a33864db449f49e89d8 (patch) | |
tree | 42bdf4fc68fe06b5bb16808009a36a866b42ab0c /sys/i386/include/npx.h | |
parent | 948508e0967ce692816e77054ef9ab5302b9313f (diff) | |
download | FreeBSD-src-fdfced8ce850bbda17da9a33864db449f49e89d8.zip FreeBSD-src-fdfced8ce850bbda17da9a33864db449f49e89d8.tar.gz |
MFamd64: Add support for extended FPU states on i386. This includes
support for AVX on i386.
- Similar to amd64, move the FPU save area out of the PCB and instead
store saved FPU state in a variable-sized buffer after the PCB on the
stack.
- To support the variable PCB location, alter the locore code to only use
the bottom-most page of proc0stack for init386(). init386() returns
the correct stack pointer to locore which adjusts the stack for thread0
before calling mi_startup().
- Don't bother setting cr3 in thread0's pcb in locore before calling
init386(). It wasn't used (init386() overwrote it at the end) and
it doesn't work with the variable-sized FPU save area.
- Remove the new-bus attachment from npx. This was only ever useful for
external co-processors using IRQ13, but those have not been supported
for several years. npxinit() is now called much earlier during boot
(init386()) similar to amd64.
- Implement PT_{GET,SET}XSTATE and I386_GET_XFPUSTATE.
- npxsave() is now only called from context switch contexts so it can
use XSAVEOPT.
Differential Revision: https://reviews.freebsd.org/D1058
Reviewed by: kib
Tested on: FreeBSD/i386 VM under bhyve on Intel i5-2520
Diffstat (limited to 'sys/i386/include/npx.h')
-rw-r--r-- | sys/i386/include/npx.h | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/sys/i386/include/npx.h b/sys/i386/include/npx.h index de55207..66f432a 100644 --- a/sys/i386/include/npx.h +++ b/sys/i386/include/npx.h @@ -45,17 +45,24 @@ #ifdef _KERNEL +struct fpu_kern_ctx; + #define PCB_USER_FPU(pcb) (((pcb)->pcb_flags & PCB_KERNNPX) == 0) +#define XSAVE_AREA_ALIGN 64 + int npxdna(void); void npxdrop(void); void npxexit(struct thread *td); int npxformat(void); int npxgetregs(struct thread *td); -void npxinit(void); +void npxinit(bool bsp); void npxresume(union savefpu *addr); void npxsave(union savefpu *addr); -void npxsetregs(struct thread *td, union savefpu *addr); +int npxsetregs(struct thread *td, union savefpu *addr, + char *xfpustate, size_t xfpustate_size); +int npxsetxstate(struct thread *td, char *xfpustate, + size_t xfpustate_size); void npxsuspend(union savefpu *addr); int npxtrap_x87(void); int npxtrap_sse(void); @@ -68,8 +75,12 @@ int fpu_kern_leave(struct thread *td, struct fpu_kern_ctx *ctx); int fpu_kern_thread(u_int flags); int is_fpu_kern_thread(u_int flags); +union savefpu *fpu_save_area_alloc(void); +void fpu_save_area_free(union savefpu *fsa); +void fpu_save_area_reset(union savefpu *fsa); + /* - * Flags for fpu_kern_enter() and fpu_kern_thread(). + * Flags for fpu_kern_alloc_ctx(), fpu_kern_enter() and fpu_kern_thread(). */ #define FPU_KERN_NORMAL 0x0000 #define FPU_KERN_NOWAIT 0x0001 |