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authorkato <kato@FreeBSD.org>1997-03-22 18:54:54 +0000
committerkato <kato@FreeBSD.org>1997-03-22 18:54:54 +0000
commit51253b5e709366e0d1ada8027f65389abde0210e (patch)
tree9fe3ec455a22a2a04a2938a4198bbda8ab91a71f /sys/i386/include/cputypes.h
parentee6bebb346b99ff43e0558c742e43ebe1e902662 (diff)
downloadFreeBSD-src-51253b5e709366e0d1ada8027f65389abde0210e.zip
FreeBSD-src-51253b5e709366e0d1ada8027f65389abde0210e.tar.gz
Improved CPU identification and initialization routines. This
supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD) Nx586 CPU, and initialize special registers of Cyrix CPU and msr of IBM Blue Lightning CPU. If revision of Cyrix 6x86 CPU < 2.7, CPU cache is enabled in write-through mode. This can be disabled by kernel configuration options. Reviewed by: Bruce Evans <bde@freebsd.org> and Jordan K. Hubbard <jkh@freebsd.org>
Diffstat (limited to 'sys/i386/include/cputypes.h')
-rw-r--r--sys/i386/include/cputypes.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/sys/i386/include/cputypes.h b/sys/i386/include/cputypes.h
index 4905900..695dafc 100644
--- a/sys/i386/include/cputypes.h
+++ b/sys/i386/include/cputypes.h
@@ -24,7 +24,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $Id$
+ * $Id: cputypes.h,v 1.7 1997/02/22 09:34:14 peter Exp $
*/
#ifndef _MACHINE_CPUTYPES_H_
@@ -52,5 +52,9 @@
#define CPU_586 5 /* Intel P.....m (I hate lawyers; it's TM) */
#define CPU_486DLC 6 /* Cyrix 486DLC */
#define CPU_686 7 /* Pentium Pro */
-
+#define CPU_M1SC 8 /* Cyrix M1sc (aka 5x86) */
+#define CPU_M1 9 /* Cyrix M1 (aka 6x86) */
+#define CPU_BLUE 10 /* IBM BlueLighting CPU */
+#define CPU_M2 11 /* Cyrix M2 (aka enhanced 6x86 with MMX */
+#define CPU_NX586 12 /* NexGen (now AMD) 586 */
#endif /* _MACHINE_CPUTYPES_H_ */
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