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| author | jkim <jkim@FreeBSD.org> | 2009-01-22 21:04:46 +0000 |
|---|---|---|
| committer | jkim <jkim@FreeBSD.org> | 2009-01-22 21:04:46 +0000 |
| commit | 1e8881cf5443d3d5876679aeedef41cc645be7e9 (patch) | |
| tree | c668daa23ec7f65643c7e0635b0e88f9909c8fc6 /sys/i386/i386/identcpu.c | |
| parent | a9b956502b7f41aed7e51418589d1735787fd0bb (diff) | |
| download | FreeBSD-src-1e8881cf5443d3d5876679aeedef41cc645be7e9.zip FreeBSD-src-1e8881cf5443d3d5876679aeedef41cc645be7e9.tar.gz | |
VIA Nano processor has a special MSR (CENT_HARDWARECTRL3) bit 32 to determine
whether TSC is P-state invariant or not. In fact, this MSR is writable but
we just leave it at the BIOS default for now.
Diffstat (limited to 'sys/i386/i386/identcpu.c')
| -rw-r--r-- | sys/i386/i386/identcpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c index aa37776..d2a0292 100644 --- a/sys/i386/i386/identcpu.c +++ b/sys/i386/i386/identcpu.c @@ -887,7 +887,8 @@ printcpuinfo(void) break; case CPU_VENDOR_CENTAUR: if (I386_CPU_FAMILY(cpu_id) == 0x6 && - I386_CPU_MODEL(cpu_id) >= 0xf) + I386_CPU_MODEL(cpu_id) >= 0xf && + (rdmsr(0x1203) & 0x100000000ULL) == 0) tsc_is_invariant = 1; break; } |
