Add fdt binding for nand for Atmel parts. This does little more than

match the device. Pinctrl will need to be added before this will work,
in addition to migrating the current board_foo.c method of configuring
these pins to something else. Non-FDT systems won't be affected, yet.

1 files changed, 17 insertions, 2 deletions

diff --git a/sys/dev/nand/nfc_at91.c b/sys/dev/nand/nfc_at91.c
index 7357cdb..74b0901 100644
--- a/sys/dev/nand/nfc_at91.c
+++ b/sys/dev/nand/nfc_at91.c
@@ -32,6 +32,8 @@
  * is on the board.
  */
 
+#include "opt_platform.h"
+
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
@@ -57,6 +59,12 @@ __FBSDID("$FreeBSD$");
 #include <dev/nand/nfc_at91.h>
 #include <arm/at91/at91_smc.h>
 
+#ifdef FDT
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+#endif
+
 /*
  * Data cycles are triggered by access to any address within the EBI CS3 region
  * that has A21 and A22 clear.  Command cycles are any access with bit A21
@@ -108,7 +116,10 @@ dev_write_1(struct at91_nand_softc *sc, bus_size_t offset, u_int8_t value)
 static int
 at91_nand_probe(device_t dev)
 {
-
+#ifdef FDT
+	if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-nand"))
+		return (ENXIO);
+#endif
 	device_set_desc(dev, "AT91 Integrated NAND controller");
 	return (BUS_PROBE_DEFAULT);
 }
@@ -274,5 +285,9 @@ static driver_t at91_nand_driver = {
 };
 
 static devclass_t at91_nand_devclass;
-DRIVER_MODULE(at91_nand, atmelarm, at91_nand_driver, at91_nand_devclass, 0, 0);
 
+#ifdef FDT
+DRIVER_MODULE(at91_nand, simplebus, at91_nand_driver, at91_nand_devclass, 0, 0);
+#else
+DRIVER_MODULE(at91_nand, atmelarm, at91_nand_driver, at91_nand_devclass, 0, 0);
+#endif