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authoradrian <adrian@FreeBSD.org>2013-06-05 00:39:20 +0000
committeradrian <adrian@FreeBSD.org>2013-06-05 00:39:20 +0000
commitc9d8be05cc0c911ebdddb6ca2f39204be21834ea (patch)
tree6b66ef6e16cd5c7db19c485436feed6cd5571104 /sys/dev
parent453c81c75304a11cbfadf3efc8762d93b53be880 (diff)
downloadFreeBSD-src-c9d8be05cc0c911ebdddb6ca2f39204be21834ea.zip
FreeBSD-src-c9d8be05cc0c911ebdddb6ca2f39204be21834ea.tar.gz
Document the AR9285/AR9485 LNA configuration information that's
stored in the ctl/ext RSSI field for chain 2. Tested: * AR9285, STA
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/ath/ath_hal/ah_desc.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/sys/dev/ath/ath_hal/ah_desc.h b/sys/dev/ath/ath_hal/ah_desc.h
index d788c2c..9f58dce 100644
--- a/sys/dev/ath/ath_hal/ah_desc.h
+++ b/sys/dev/ath/ath_hal/ah_desc.h
@@ -157,6 +157,32 @@ struct ath_rx_status {
#define HAL_RX_IS_APSD 0x0100 /* Is ASPD trigger frame */
#define HAL_RX_STBC 0x0200 /* Is an STBC frame */
+/*
+ * This is the format of RSSI[2] on the AR9285/AR9485.
+ * It encodes the LNA configuration information.
+ *
+ * For boards with an external diversity antenna switch,
+ * HAL_RX_LNA_EXTCFG encodes which configuration was
+ * used (antenna 1 or antenna 2.) This feeds into the
+ * switch table and ensures that the given antenna was
+ * connected to an LNA.
+ */
+#define HAL_RX_LNA_LNACFG 0x80 /* 1 = main LNA config used, 0 = ALT */
+#define HAL_RX_LNA_EXTCFG 0x40 /* 0 = external diversity ant1, 1 = ant2 */
+#define HAL_RX_LNA_CFG_USED 0x30 /* 2 bits; LNA config used on RX */
+#define HAL_RX_LNA_CFG_USED_S 4
+#define HAL_RX_LNA_CFG_MAIN 0x0c /* 2 bits; "Main" LNA config */
+#define HAL_RX_LNA_CFG_ALT 0x02 /* 2 bits; "Alt" LNA config */
+
+/*
+ * This is the format of RSSI_EXT[2] on the AR9285/AR9485.
+ * It encodes the switch table configuration and fast diversity
+ * value.
+ */
+#define HAL_RX_LNA_FASTDIV 0x40 /* 1 = fast diversity measurement done */
+#define HAL_RX_LNA_SWITCH_0 0x30 /* 2 bits; sw_0[1:0] */
+#define HAL_RX_LNA_SWITCH_COM 0x0f /* 4 bits, sw_com[3:0] */
+
enum {
HAL_PHYERR_UNDERRUN = 0, /* Transmit underrun */
HAL_PHYERR_TIMING = 1, /* Timing error */
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