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authorbrucec <brucec@FreeBSD.org>2011-02-21 09:01:34 +0000
committerbrucec <brucec@FreeBSD.org>2011-02-21 09:01:34 +0000
commit6d9b42b4862ca331b22065d875de9cad9da72658 (patch)
tree1f08a200604ea39c38fc67b8558b5638a6dfba0d /sys/dev
parent879ce9c16d5491279b3bcbf139b4b4a967fb3fab (diff)
downloadFreeBSD-src-6d9b42b4862ca331b22065d875de9cad9da72658.zip
FreeBSD-src-6d9b42b4862ca331b22065d875de9cad9da72658.tar.gz
Fix typos - remove duplicate "the".
PR: bin/154928 Submitted by: Eitan Adler <lists at eitanadler.com> MFC after: 3 days
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/advansys/adwcam.c2
-rw-r--r--sys/dev/aic7xxx/aic79xx_osm.h2
-rw-r--r--sys/dev/aic7xxx/aic7xxx_osm.h2
-rw-r--r--sys/dev/asr/i2omsg.h2
-rw-r--r--sys/dev/bktr/bktr_card.c2
-rw-r--r--sys/dev/ctau/ctau.c2
-rw-r--r--sys/dev/ctau/ctddk.h2
-rw-r--r--sys/dev/cxgb/cxgb_main.c4
-rw-r--r--sys/dev/drm/mach64_dma.c2
-rw-r--r--sys/dev/drm/r300_reg.h2
-rw-r--r--sys/dev/e1000/e1000_82575.c2
-rw-r--r--sys/dev/e1000/e1000_ich8lan.c2
-rw-r--r--sys/dev/ep/if_epreg.h2
-rw-r--r--sys/dev/fdc/fdc.c2
-rw-r--r--sys/dev/ixgb/ixgb_ee.c2
-rw-r--r--sys/dev/malo/if_malohal.h2
-rw-r--r--sys/dev/mwl/mwlhal.h2
-rw-r--r--sys/dev/nxge/xgehal/xgehal-device.c2
-rw-r--r--sys/dev/nxge/xgehal/xgehal-ring-fp.c2
-rw-r--r--sys/dev/random/randomdev_soft.c2
-rw-r--r--sys/dev/sound/pci/es137x.c2
-rw-r--r--sys/dev/sym/sym_fw1.h2
-rw-r--r--sys/dev/sym/sym_fw2.h2
-rw-r--r--sys/dev/uart/uart_dev_ns8250.c2
-rw-r--r--sys/dev/usb/usb_process.c2
-rw-r--r--sys/dev/vx/if_vxreg.h2
-rw-r--r--sys/dev/wpi/if_wpi.c2
27 files changed, 28 insertions, 28 deletions
diff --git a/sys/dev/advansys/adwcam.c b/sys/dev/advansys/adwcam.c
index 7e3b4f4..fdee3fd 100644
--- a/sys/dev/advansys/adwcam.c
+++ b/sys/dev/advansys/adwcam.c
@@ -1,5 +1,5 @@
/*-
- * CAM SCSI interface for the the Advanced Systems Inc.
+ * CAM SCSI interface for the Advanced Systems Inc.
* Second Generation SCSI controllers.
*
* Product specific probe and attach routines can be found in:
diff --git a/sys/dev/aic7xxx/aic79xx_osm.h b/sys/dev/aic7xxx/aic79xx_osm.h
index 692f3f9..db790df 100644
--- a/sys/dev/aic7xxx/aic79xx_osm.h
+++ b/sys/dev/aic7xxx/aic79xx_osm.h
@@ -103,7 +103,7 @@
* The number of dma segments supported. The sequencer can handle any number
* of physically contiguous S/G entrys. To reduce the driver's memory
* consumption, we limit the number supported to be sufficient to handle
- * the largest mapping supported by the the legacy kernel MAXPHYS setting of
+ * the largest mapping supported by the legacy kernel MAXPHYS setting of
* 128K. This can be increased once some testing is done. Assuming the
* transfer is as fragmented as possible and unaligned, this turns out to
* be the number of paged sized transfers in MAXPHYS plus an extra element
diff --git a/sys/dev/aic7xxx/aic7xxx_osm.h b/sys/dev/aic7xxx/aic7xxx_osm.h
index 388cf9e..9a2939e 100644
--- a/sys/dev/aic7xxx/aic7xxx_osm.h
+++ b/sys/dev/aic7xxx/aic7xxx_osm.h
@@ -115,7 +115,7 @@ extern devclass_t ahc_devclass;
* The number of dma segments supported. The sequencer can handle any number
* of physically contiguous S/G entrys. To reduce the driver's memory
* consumption, we limit the number supported to be sufficient to handle
- * the largest mapping supported by the the legacy kernel MAXPHYS setting of
+ * the largest mapping supported by the legacy kernel MAXPHYS setting of
* 128K. This can be increased once some testing is done. Assuming the
* be the number of paged sized transfers in MAXPHYS plus an extra element
* to handle any unaligned residual. The sequencer fetches SG elements
diff --git a/sys/dev/asr/i2omsg.h b/sys/dev/asr/i2omsg.h
index 833bd91..a938e38 100644
--- a/sys/dev/asr/i2omsg.h
+++ b/sys/dev/asr/i2omsg.h
@@ -183,7 +183,7 @@ PRAGMA_PACK_PUSH
#define I2O_VERSION_OFFSET_SGL_TRL_OFFSET_MASK 0xF0
/* Defines for the Message Flags Field. */
-/* Please Note the the FAIL bit is only set in the Transport Fail Message. */
+/* Please Note the FAIL bit is only set in the Transport Fail Message. */
#define I2O_MESSAGE_FLAGS_STATIC 0x01
#define I2O_MESSAGE_FLAGS_64BIT_CONTEXT 0x02
#define I2O_MESSAGE_FLAGS_MULTIPLE 0x10
diff --git a/sys/dev/bktr/bktr_card.c b/sys/dev/bktr/bktr_card.c
index 00526de..e59ebbe 100644
--- a/sys/dev/bktr/bktr_card.c
+++ b/sys/dev/bktr/bktr_card.c
@@ -570,7 +570,7 @@ static int locate_eeprom_address( bktr_ptr_t bktr) {
*
* However some makes of card (eg Hauppauge) come with a configuration eeprom
* which tells us the make of the card. Most eeproms also tell us the
- * tuner type and other features of the the cards.
+ * tuner type and other features of the cards.
*
* The current probe code works as follows
* A) If the card uses a Bt878/879:
diff --git a/sys/dev/ctau/ctau.c b/sys/dev/ctau/ctau.c
index 9b4f404..6a6b65d 100644
--- a/sys/dev/ctau/ctau.c
+++ b/sys/dev/ctau/ctau.c
@@ -1734,7 +1734,7 @@ ct_board_opt_t ct_board_opt_dflt = {
0, /* board control register 2 */
{ /* DMA priority control register */
PCR_PRIO_ROTATE,
- 0, /* all channels share the the bus hold */
+ 0, /* all channels share the bus hold */
0, /* hold the bus until all transfers done */
},
CFG_A, /* E1/G.703 config: two independent channels */
diff --git a/sys/dev/ctau/ctddk.h b/sys/dev/ctau/ctddk.h
index be0a092..2d53dee 100644
--- a/sys/dev/ctau/ctddk.h
+++ b/sys/dev/ctau/ctddk.h
@@ -206,7 +206,7 @@ typedef struct {
typedef struct {
unsigned prio : 3; /* priority of channels */
unsigned noshare : 1; /* 1 - chan holds the bus until end of data */
- /* 0 - all channels share the the bus hold */
+ /* 0 - all channels share the bus hold */
unsigned release : 1; /* 1 - release the bus between transfers */
/* 0 - hold the bus until all transfers done */
} ct_pcr_t;
diff --git a/sys/dev/cxgb/cxgb_main.c b/sys/dev/cxgb/cxgb_main.c
index 2638006..f094846 100644
--- a/sys/dev/cxgb/cxgb_main.c
+++ b/sys/dev/cxgb/cxgb_main.c
@@ -1908,7 +1908,7 @@ cxgb_uninit_synchronized(struct port_info *pi)
/*
* Clear this port's bit from the open device map, and then drain all
* the tasks that can access/manipulate this port's port_info or ifp.
- * We disable this port's interrupts here and so the the slow/ext
+ * We disable this port's interrupts here and so the slow/ext
* interrupt tasks won't be enqueued. The tick task will continue to
* be enqueued every second but the runs after this drain will not see
* this port in the open device map.
@@ -2858,7 +2858,7 @@ cxgb_extension_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data,
u64 buf[32];
/*
- * Use these to avoid modifying len/addr in the the return
+ * Use these to avoid modifying len/addr in the return
* struct
*/
uint32_t len = t->len, addr = t->addr;
diff --git a/sys/dev/drm/mach64_dma.c b/sys/dev/drm/mach64_dma.c
index 9aa0faa..4ac09e8 100644
--- a/sys/dev/drm/mach64_dma.c
+++ b/sys/dev/drm/mach64_dma.c
@@ -173,7 +173,7 @@ static int mach64_ring_idle(drm_mach64_private_t *dev_priv)
}
/**
- * Reset the the ring buffer descriptors.
+ * Reset the ring buffer descriptors.
*
* \sa mach64_do_engine_reset()
*/
diff --git a/sys/dev/drm/r300_reg.h b/sys/dev/drm/r300_reg.h
index 8a13c31..6df4611 100644
--- a/sys/dev/drm/r300_reg.h
+++ b/sys/dev/drm/r300_reg.h
@@ -353,7 +353,7 @@ __FBSDID("$FreeBSD$");
# define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0
# define R300_PVS_CNTL_1_POS_END_SHIFT 10
# define R300_PVS_CNTL_1_PROGRAM_END_SHIFT 20
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative the vertex program parameters area. */
#define R300_VAP_PVS_CNTL_2 0x22D4
# define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
# define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT 16
diff --git a/sys/dev/e1000/e1000_82575.c b/sys/dev/e1000/e1000_82575.c
index 03c70e0..db5609b 100644
--- a/sys/dev/e1000/e1000_82575.c
+++ b/sys/dev/e1000/e1000_82575.c
@@ -1986,7 +1986,7 @@ out:
* e1000_reset_mdicnfg_82580 - Reset MDICNFG destination and com_mdio bits
* @hw: pointer to the HW structure
*
- * This resets the the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
+ * This resets the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
* the values found in the EEPROM. This addresses an issue in which these
* bits are not restored from EEPROM after reset.
**/
diff --git a/sys/dev/e1000/e1000_ich8lan.c b/sys/dev/e1000/e1000_ich8lan.c
index b2882ee..8218908 100644
--- a/sys/dev/e1000/e1000_ich8lan.c
+++ b/sys/dev/e1000/e1000_ich8lan.c
@@ -3218,7 +3218,7 @@ out:
* @hw: pointer to the HW structure
*
* ICH8 use the PCI Express bus, but does not contain a PCI Express Capability
- * register, so the the bus width is hard coded.
+ * register, so the bus width is hard coded.
**/
static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)
{
diff --git a/sys/dev/ep/if_epreg.h b/sys/dev/ep/if_epreg.h
index f3c269f..9453891 100644
--- a/sys/dev/ep/if_epreg.h
+++ b/sys/dev/ep/if_epreg.h
@@ -113,7 +113,7 @@
/**************************************************************************
* *
* These are the registers for the 3Com 3c509 and their bit patterns when *
- * applicable. They have been taken out the the "EtherLink III Parallel *
+ * applicable. They have been taken out the "EtherLink III Parallel *
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
* from 3com. *
* *
diff --git a/sys/dev/fdc/fdc.c b/sys/dev/fdc/fdc.c
index ed621b2..01998ec 100644
--- a/sys/dev/fdc/fdc.c
+++ b/sys/dev/fdc/fdc.c
@@ -1261,7 +1261,7 @@ fdmisccmd(struct fd_data *fd, u_int cmd, void *data)
/*
* Set up a bio request for fdstrategy(). bio_offset is faked
- * so that fdstrategy() will seek to the the requested
+ * so that fdstrategy() will seek to the requested
* cylinder, and use the desired head.
*/
bp->bio_cmd = cmd;
diff --git a/sys/dev/ixgb/ixgb_ee.c b/sys/dev/ixgb/ixgb_ee.c
index 861a99a..4ce650e 100644
--- a/sys/dev/ixgb/ixgb_ee.c
+++ b/sys/dev/ixgb/ixgb_ee.c
@@ -325,7 +325,7 @@ ixgb_wait_eeprom_command(struct ixgb_hw *hw)
* hw - Struct containing variables accessed by shared code
*
* Reads the first 64 16 bit words of the EEPROM and sums the values read.
- * If the the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
+ * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
* valid.
*
* Returns:
diff --git a/sys/dev/malo/if_malohal.h b/sys/dev/malo/if_malohal.h
index 80c27ac..fb962cc 100644
--- a/sys/dev/malo/if_malohal.h
+++ b/sys/dev/malo/if_malohal.h
@@ -133,7 +133,7 @@ struct malo_hal_hwstats {
/*
* Set Antenna Configuration (legacy operation).
*
- * The RX antenna can be selected using the the bitmask
+ * The RX antenna can be selected using the bitmask
* ant (bit 0 = antenna 1, bit 1 = antenna 2, etc.)
* (diversity?XXX)
*/
diff --git a/sys/dev/mwl/mwlhal.h b/sys/dev/mwl/mwlhal.h
index ab6b7d0..25b8b07 100644
--- a/sys/dev/mwl/mwlhal.h
+++ b/sys/dev/mwl/mwlhal.h
@@ -291,7 +291,7 @@ int mwl_hal_setradio(struct mwl_hal *mh, int onoff, MWL_HAL_PREAMBLE preamble);
/*
* Set Antenna Configuration (legacy operation).
*
- * The RX antenna can be selected using the the bitmask
+ * The RX antenna can be selected using the bitmask
* ant (bit 0 = antenna 1, bit 1 = antenna 2, etc.)
* (diversity?XXX)
*/
diff --git a/sys/dev/nxge/xgehal/xgehal-device.c b/sys/dev/nxge/xgehal/xgehal-device.c
index 882aaf7..43f944a 100644
--- a/sys/dev/nxge/xgehal/xgehal-device.c
+++ b/sys/dev/nxge/xgehal/xgehal-device.c
@@ -4418,7 +4418,7 @@ xge_hal_device_status(xge_hal_device_t *hldev, u64 *hw_status)
#ifndef XGE_HAL_HERC_EMULATION
/*
* Andrew: in PCI 33 mode, the P_PLL is not used, and therefore,
- * the the P_PLL_LOCK bit in the adapter_status register will
+ * the P_PLL_LOCK bit in the adapter_status register will
* not be asserted.
*/
if (!(tmp64 & XGE_HAL_ADAPTER_STATUS_P_PLL_LOCK) &&
diff --git a/sys/dev/nxge/xgehal/xgehal-ring-fp.c b/sys/dev/nxge/xgehal/xgehal-ring-fp.c
index e25a265..349d685 100644
--- a/sys/dev/nxge/xgehal/xgehal-ring-fp.c
+++ b/sys/dev/nxge/xgehal/xgehal-ring-fp.c
@@ -801,7 +801,7 @@ xge_hal_ring_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh)
* xge_hal_ring_is_next_dtr_completed - Check if the next dtr is completed
* @channelh: Channel handle.
*
- * Checks if the the _next_ completed descriptor is in host memory
+ * Checks if the _next_ completed descriptor is in host memory
*
* Returns: XGE_HAL_OK - success.
* XGE_HAL_INF_NO_MORE_COMPLETED_DESCRIPTORS - No completed descriptors
diff --git a/sys/dev/random/randomdev_soft.c b/sys/dev/random/randomdev_soft.c
index cef64ab..c720902 100644
--- a/sys/dev/random/randomdev_soft.c
+++ b/sys/dev/random/randomdev_soft.c
@@ -347,7 +347,7 @@ random_yarrow_write(void *buf, int count)
/*
* Break the input up into HARVESTSIZE chunks. The writer has too
- * much control here, so "estimate" the the entropy as zero.
+ * much control here, so "estimate" the entropy as zero.
*/
for (i = 0; i < count; i += HARVESTSIZE) {
chunk = HARVESTSIZE;
diff --git a/sys/dev/sound/pci/es137x.c b/sys/dev/sound/pci/es137x.c
index 5b9591a..f4e24af 100644
--- a/sys/dev/sound/pci/es137x.c
+++ b/sys/dev/sound/pci/es137x.c
@@ -584,7 +584,7 @@ eschan1370_setspeed(kobj_t obj, void *data, uint32_t speed)
/*
* DAC1 does not support continuous rate settings.
* Pick the nearest and use it since FEEDER_RATE will
- * do the the proper conversion for us.
+ * do the proper conversion for us.
*/
es->ctrl &= ~CTRL_WTSRSEL;
if (speed < 8268) {
diff --git a/sys/dev/sym/sym_fw1.h b/sys/dev/sym/sym_fw1.h
index 1a4d010..aa1c7a4 100644
--- a/sys/dev/sym/sym_fw1.h
+++ b/sys/dev/sym/sym_fw1.h
@@ -262,7 +262,7 @@ static const struct SYM_FWA_SCR SYM_FWA_SCR = {
* The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
* is a critical path. If it is partially executed, it then
* may happen that the job address is not yet in the DSA
- * and the the next queue position points to the next JOB.
+ * and the next queue position points to the next JOB.
*/
}/*-------------------------< GETJOB_BEGIN >---------------------*/,{
/*
diff --git a/sys/dev/sym/sym_fw2.h b/sys/dev/sym/sym_fw2.h
index d006c9c..9785703 100644
--- a/sys/dev/sym/sym_fw2.h
+++ b/sys/dev/sym/sym_fw2.h
@@ -252,7 +252,7 @@ static const struct SYM_FWA_SCR SYM_FWA_SCR = {
* The below GETJOB_BEGIN to GETJOB_END section of SCRIPTS
* is a critical path. If it is partially executed, it then
* may happen that the job address is not yet in the DSA
- * and the the next queue position points to the next JOB.
+ * and the next queue position points to the next JOB.
*/
SCR_LOAD_ABS (dsa, 4),
PADDR_B (startpos),
diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c
index b93e254..3cdd5ad 100644
--- a/sys/dev/uart/uart_dev_ns8250.c
+++ b/sys/dev/uart/uart_dev_ns8250.c
@@ -693,7 +693,7 @@ ns8250_bus_probe(struct uart_softc *sc)
/*
* We should have a sufficiently clean "pipe" to determine the
* size of the FIFOs. We send as much characters as is reasonable
- * and wait for the the overflow bit in the LSR register to be
+ * and wait for the overflow bit in the LSR register to be
* asserted, counting the characters as we send them. Based on
* that count we know the FIFO size.
*/
diff --git a/sys/dev/usb/usb_process.c b/sys/dev/usb/usb_process.c
index febc3a1..0509ec2 100644
--- a/sys/dev/usb/usb_process.c
+++ b/sys/dev/usb/usb_process.c
@@ -462,7 +462,7 @@ usb_proc_drain(struct usb_process *up)
/*------------------------------------------------------------------------*
* usb_proc_rewakeup
*
- * This function is called to re-wakeup the the given USB
+ * This function is called to re-wakeup the given USB
* process. This usually happens after that the USB system has been in
* polling mode, like during a panic. This function must be called
* having "up->up_mtx" locked.
diff --git a/sys/dev/vx/if_vxreg.h b/sys/dev/vx/if_vxreg.h
index b876782..08ac408 100644
--- a/sys/dev/vx/if_vxreg.h
+++ b/sys/dev/vx/if_vxreg.h
@@ -112,7 +112,7 @@
/**************************************************************************
* These are the registers for the 3Com 3c509 and their bit patterns when *
- * applicable. They have been taken out the the "EtherLink III Parallel *
+ * applicable. They have been taken out the "EtherLink III Parallel *
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
* from 3com. *
**************************************************************************/
diff --git a/sys/dev/wpi/if_wpi.c b/sys/dev/wpi/if_wpi.c
index 64be427..53ad7f3 100644
--- a/sys/dev/wpi/if_wpi.c
+++ b/sys/dev/wpi/if_wpi.c
@@ -29,7 +29,7 @@ __FBSDID("$FreeBSD$");
* state and told to load boot firmware. The boot firmware loads an init and a
* main binary firmware image into SRAM on the card via DMA.
* Once the firmware is loaded, the driver/hw then
- * communicate by way of circular dma rings via the the SRAM to the firmware.
+ * communicate by way of circular dma rings via the SRAM to the firmware.
*
* There is 6 memory rings. 1 command ring, 1 rx data ring & 4 tx data rings.
* The 4 tx data rings allow for prioritization QoS.
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