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author | simokawa <simokawa@FreeBSD.org> | 2003-03-24 03:47:36 +0000 |
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committer | simokawa <simokawa@FreeBSD.org> | 2003-03-24 03:47:36 +0000 |
commit | 176bfd0826418757fdcb34d8793a91e53c091b7e (patch) | |
tree | f72420b67a349d23a5e98e6c33fdb8470e64a7c8 /sys/dev | |
parent | c1f83c0cff3557245fad7eb0052cdbca6d918681 (diff) | |
download | FreeBSD-src-176bfd0826418757fdcb34d8793a91e53c091b7e.zip FreeBSD-src-176bfd0826418757fdcb34d8793a91e53c091b7e.tar.gz |
Safe PCI configuration.
- Clear PCIM_CMD_MWRICEN:
some chips seem to have problem with write invalidate.
clearing this bit fixes SBP timeout problem.
Tested by: Michael Reifenberger <Michael.Reifenberger@Plaut.de>
- Set PCIM_CMD_SERRESPEN and PCIM_CMD_PERRESPEN
- Moderate value for latency timer.
Diffstat (limited to 'sys/dev')
-rw-r--r-- | sys/dev/firewire/fwohci_pci.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/sys/dev/firewire/fwohci_pci.c b/sys/dev/firewire/fwohci_pci.c index 5f1efbd..2498720 100644 --- a/sys/dev/firewire/fwohci_pci.c +++ b/sys/dev/firewire/fwohci_pci.c @@ -154,11 +154,15 @@ fwohci_pci_init(device_t self) u_int16_t cmd; cmd = pci_read_config(self, PCIR_COMMAND, 2); - cmd |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; + cmd |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN | + PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN; +#if 1 + cmd &= ~PCIM_CMD_MWRICEN; +#endif pci_write_config(self, PCIR_COMMAND, cmd, 2); latency = pci_read_config(self, PCIR_LATTIMER, 1); -#define DEF_LATENCY 250 /* Derived from Max Bulk Transfer size 512 Bytes*/ +#define DEF_LATENCY 0x20 if( latency < DEF_LATENCY ) { latency = DEF_LATENCY; device_printf(self, "PCI bus latency was changing to"); |