diff options
| author | hselasky <hselasky@FreeBSD.org> | 2014-05-22 11:58:15 +0000 |
|---|---|---|
| committer | hselasky <hselasky@FreeBSD.org> | 2014-05-22 11:58:15 +0000 |
| commit | 98008afe590a1fb1c629f0060fe2b6dc20d2de99 (patch) | |
| tree | bfc08ca3edb3607966cb2a86ddf8f4a48b2447d6 /sys/dev/usb/controller/xhci.c | |
| parent | 0d172b522e4a1090ee82ea756de1ae5e55704930 (diff) | |
| download | FreeBSD-src-98008afe590a1fb1c629f0060fe2b6dc20d2de99.zip FreeBSD-src-98008afe590a1fb1c629f0060fe2b6dc20d2de99.tar.gz | |
- Fix a bug where the TLBPC value was forced to being odd for IN
direction isochronous transfers.
- Remove setting of fields which does not belong to the respective
TRBs. These fields are currently set as zero and this is more a
cosmetic change.
MFC after: 3 days
Submitted by: Horse Ma <HMa@wyse.com>
Diffstat (limited to 'sys/dev/usb/controller/xhci.c')
| -rw-r--r-- | sys/dev/usb/controller/xhci.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/sys/dev/usb/controller/xhci.c b/sys/dev/usb/controller/xhci.c index 5092cc9..4570ad2 100644 --- a/sys/dev/usb/controller/xhci.c +++ b/sys/dev/usb/controller/xhci.c @@ -1849,31 +1849,25 @@ restart: XHCI_TRB_3_ISO_SIA_BIT; } if (temp->direction == UE_DIR_IN) - dword |= XHCI_TRB_3_DIR_IN | XHCI_TRB_3_ISP_BIT; + dword |= XHCI_TRB_3_ISP_BIT; break; case XHCI_TRB_TYPE_DATA_STAGE: dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT | - XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_DATA_STAGE) | - XHCI_TRB_3_TBC_SET(temp->tbc) | - XHCI_TRB_3_TLBPC_SET(temp->tlbpc); + XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_DATA_STAGE); if (temp->direction == UE_DIR_IN) dword |= XHCI_TRB_3_DIR_IN | XHCI_TRB_3_ISP_BIT; break; case XHCI_TRB_TYPE_STATUS_STAGE: dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT | - XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_STATUS_STAGE) | - XHCI_TRB_3_TBC_SET(temp->tbc) | - XHCI_TRB_3_TLBPC_SET(temp->tlbpc); + XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_STATUS_STAGE); if (temp->direction == UE_DIR_IN) dword |= XHCI_TRB_3_DIR_IN; break; default: /* XHCI_TRB_TYPE_NORMAL */ dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT | - XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_NORMAL) | - XHCI_TRB_3_TBC_SET(temp->tbc) | - XHCI_TRB_3_TLBPC_SET(temp->tlbpc); + XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_NORMAL); if (temp->direction == UE_DIR_IN) - dword |= XHCI_TRB_3_DIR_IN | XHCI_TRB_3_ISP_BIT; + dword |= XHCI_TRB_3_ISP_BIT; break; } td->td_trb[x].dwTrb3 = htole32(dword); |
