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| author | eadler <eadler@FreeBSD.org> | 2013-05-12 16:43:26 +0000 |
|---|---|---|
| committer | eadler <eadler@FreeBSD.org> | 2013-05-12 16:43:26 +0000 |
| commit | 6907881cb814953c545475a8a63e3afc402bd547 (patch) | |
| tree | 934de69485eb14f423c724379ef3b6adc9c60b56 /sys/dev/uart/uart_core.c | |
| parent | 08da0b8fad46087c0267f23830241099ae459fa5 (diff) | |
| download | FreeBSD-src-6907881cb814953c545475a8a63e3afc402bd547.zip FreeBSD-src-6907881cb814953c545475a8a63e3afc402bd547.tar.gz | |
Fix several typos
PR: kern/176054
Submitted by: Christoph Mallon <christoph.mallon@gmx.de>
MFC after: 3 days
Diffstat (limited to 'sys/dev/uart/uart_core.c')
| -rw-r--r-- | sys/dev/uart/uart_core.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/dev/uart/uart_core.c b/sys/dev/uart/uart_core.c index b264e5b..b6bed03 100644 --- a/sys/dev/uart/uart_core.c +++ b/sys/dev/uart/uart_core.c @@ -137,7 +137,7 @@ uart_intr_break(void *arg) * much of the data we can, but otherwise flush the receiver FIFO to * create some breathing room. The net effect is that we avoid the * overrun condition to happen for the next X characters, where X is - * related to the FIFO size at the cost of loosing data right away. + * related to the FIFO size at the cost of losing data right away. * So, instead of having multiple overrun interrupts in close proximity * to each other and possibly pessimizing UART interrupt latency for * other UARTs in a multiport configuration, we create a longer segment @@ -192,7 +192,7 @@ uart_intr_rxready(void *arg) * Line or modem status change (OOB signalling). * We pass the signals to the software interrupt handler for further * processing. Note that we merge the delta bits, but set the state - * bits. This is to avoid loosing state transitions due to having more + * bits. This is to avoid losing state transitions due to having more * than 1 hardware interrupt between software interrupts. */ static __inline int |
