MFC: r287768, r290566, r290946

- Although it doesn't make a whole lot of sense to enable RX and TX
  before their initial configuration is done, it turns out that r281337
  (MFCed to stable/10 in r285177) has the inverse effect on some older
  chips. Moreover, as with newer chips before, two chips seemingly
  identical according to their MAC revisions may behave differently in
  this regard, with most working but a few not, making changes extremely
  hard to test.
  Closer inspection of the corresponding Linux code suggests that RX
  and TX should only be enabled after their initial configuration with
  RTL8168G and later chips, i. e. RTL8106E{,US}, RTL8107E, as well as
  RTL8168{EP,G,GU,H}, so limit the new code path to these. [1]
- Distinguish between RTL8168H and RTL8107E, with the latter being the
  10/100-Mbit/s-only variant of the former.
- For MAC variants that can only do Fast Ethernet at a maximum, ensure
  that we don't advertise Gigabit Ethernet speed.
- In re_stop(), do the inverse of re_init_locked() and enable RXDV gate
  on RTL8168G and later chips again, matching what Linux does.
- With the latter in place, it turns out that WOL previously only worked
  by accident with RTL8168G and later chips when the interface actually
  was brought up. This is due to the fact that with these MAC variants,
  RXDV gate needs be disabled for WOL to work. So in re_setwol() do just
  that when IFCAP_WOL is requested.
- Add preliminary support for RTL8168H and RTL8107E, with the latter
  being the 10/100-Mbit/s-only variant of the former.

1 files changed, 2 insertions, 2 deletions

diff --git a/sys/dev/rl/if_rlreg.h b/sys/dev/rl/if_rlreg.h
index b0de60f..5a5c5f5 100644
--- a/sys/dev/rl/if_rlreg.h
+++ b/sys/dev/rl/if_rlreg.h
@@ -195,6 +195,7 @@
 #define	RL_HWREV_8168G		0x4C000000
 #define	RL_HWREV_8168EP		0x50000000
 #define	RL_HWREV_8168GU		0x50800000
+#define	RL_HWREV_8168H		0x54000000
 #define	RL_HWREV_8411B		0x5C800000
 #define	RL_HWREV_8139		0x60000000
 #define	RL_HWREV_8139A		0x70000000
@@ -930,8 +931,7 @@ struct rl_softc {
 #define	RL_FLAG_CMDSTOP_WAIT_TXQ	0x00008000
 #define	RL_FLAG_WOL_MANLINK	0x00010000
 #define	RL_FLAG_EARLYOFF	0x00020000
-#define	RL_FLAG_EARLYOFFV2	0x00040000
-#define	RL_FLAG_RXDV_GATED	0x00080000
+#define	RL_FLAG_8168G_PLUS	0x00040000
 #define	RL_FLAG_PCIE		0x40000000
 #define	RL_FLAG_LINK		0x80000000
 };