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| author | yongari <yongari@FreeBSD.org> | 2007-01-23 00:44:12 +0000 |
|---|---|---|
| committer | yongari <yongari@FreeBSD.org> | 2007-01-23 00:44:12 +0000 |
| commit | b4c0dd68e054cfd4fa1dc3a3a8d45dcb7a4c8533 (patch) | |
| tree | acd5d71bfdf5b4630ff75487992c31e16e3c2c6b /sys/dev/re | |
| parent | 2df6044b61d3d828971f1d8cca95a1f6a6a1d6b1 (diff) | |
| download | FreeBSD-src-b4c0dd68e054cfd4fa1dc3a3a8d45dcb7a4c8533.zip FreeBSD-src-b4c0dd68e054cfd4fa1dc3a3a8d45dcb7a4c8533.tar.gz | |
It seems that enabling Tx and Rx before setting descriptor DMA
addresses shall access invalid descriptor DMA addresses on PCIe
hardwares and then panicked the system.
To fix it set descriptor DMA addresses before enabling Tx and Rx
such that hardware can see valid descriptor DMA addresses. Also
set RL_EARLY_TX_THRESH before starting Tx and Rx.
Reported by: steve.tell AT crashmail DOT de
Tested by: steve.tell AT crashmail DOT de
Obtained from: NetBSD
MFC after: 1 week
Diffstat (limited to 'sys/dev/re')
| -rw-r--r-- | sys/dev/re/if_re.c | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c index a4745ac..98b121f 100644 --- a/sys/dev/re/if_re.c +++ b/sys/dev/re/if_re.c @@ -2319,6 +2319,20 @@ re_init_locked(sc) re_tx_list_init(sc); /* + * Load the addresses of the RX and TX lists into the chip. + */ + + CSR_WRITE_4(sc, RL_RXLIST_ADDR_HI, + RL_ADDR_HI(sc->rl_ldata.rl_rx_list_addr)); + CSR_WRITE_4(sc, RL_RXLIST_ADDR_LO, + RL_ADDR_LO(sc->rl_ldata.rl_rx_list_addr)); + + CSR_WRITE_4(sc, RL_TXLIST_ADDR_HI, + RL_ADDR_HI(sc->rl_ldata.rl_tx_list_addr)); + CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO, + RL_ADDR_LO(sc->rl_ldata.rl_tx_list_addr)); + + /* * Enable transmit and receive. */ CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); @@ -2335,6 +2349,9 @@ re_init_locked(sc) RL_TXCFG_CONFIG|RL_LOOPTEST_ON_CPLUS); } else CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG); + + CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16); + CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG); /* Set the individual bit to receive frames for this host only. */ @@ -2389,21 +2406,6 @@ re_init_locked(sc) /* Enable receiver and transmitter. */ CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); #endif - /* - * Load the addresses of the RX and TX lists into the chip. - */ - - CSR_WRITE_4(sc, RL_RXLIST_ADDR_HI, - RL_ADDR_HI(sc->rl_ldata.rl_rx_list_addr)); - CSR_WRITE_4(sc, RL_RXLIST_ADDR_LO, - RL_ADDR_LO(sc->rl_ldata.rl_rx_list_addr)); - - CSR_WRITE_4(sc, RL_TXLIST_ADDR_HI, - RL_ADDR_HI(sc->rl_ldata.rl_tx_list_addr)); - CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO, - RL_ADDR_LO(sc->rl_ldata.rl_tx_list_addr)); - - CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16); #ifdef RE_TX_MODERATION /* |
