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| author | eadler <eadler@FreeBSD.org> | 2014-02-04 03:36:42 +0000 |
|---|---|---|
| committer | eadler <eadler@FreeBSD.org> | 2014-02-04 03:36:42 +0000 |
| commit | ec294fd7f5fc5de11ed889d6c2d701f918d1ecfb (patch) | |
| tree | 7e76e370b9406b0383b17bd343084addb4ad6a25 /sys/dev/ral/rt2860reg.h | |
| parent | d374d7f398b846dc59d8a5ec3c7bfb318cf880af (diff) | |
| download | FreeBSD-src-ec294fd7f5fc5de11ed889d6c2d701f918d1ecfb.zip FreeBSD-src-ec294fd7f5fc5de11ed889d6c2d701f918d1ecfb.tar.gz | |
MFC r258779,r258780,r258787,r258822:
Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.
Similar to the (1 << 31) case it is not defined to do (2 << 30).
This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.
A similar change was made in OpenBSD.
Diffstat (limited to 'sys/dev/ral/rt2860reg.h')
| -rw-r--r-- | sys/dev/ral/rt2860reg.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/sys/dev/ral/rt2860reg.h b/sys/dev/ral/rt2860reg.h index 06c275d..fe9fb4f 100644 --- a/sys/dev/ral/rt2860reg.h +++ b/sys/dev/ral/rt2860reg.h @@ -258,7 +258,7 @@ #define RT2860_TX_DMA_EN (1 << 0) /* possible flags for register DELAY_INT_CFG */ -#define RT2860_TXDLY_INT_EN (1 << 31) +#define RT2860_TXDLY_INT_EN (1U << 31) #define RT2860_TXMAX_PINT_SHIFT 24 #define RT2860_TXMAX_PTIME_SHIFT 16 #define RT2860_RXDLY_INT_EN (1 << 15) @@ -270,7 +270,7 @@ #define RT2860_GPIO_O_SHIFT 0 /* possible flags for register USB_DMA_CFG */ -#define RT2860_USB_TX_BUSY (1 << 31) +#define RT2860_USB_TX_BUSY (1U << 31) #define RT2860_USB_RX_BUSY (1 << 30) #define RT2860_USB_EPOUT_VLD_SHIFT 24 #define RT2860_USB_TX_EN (1 << 23) @@ -370,7 +370,7 @@ #define RT2860_TX0Q_PCNT_MASK 0x000000ff /* possible flags for register CAP_CTRL */ -#define RT2860_CAP_ADC_FEQ (1 << 31) +#define RT2860_CAP_ADC_FEQ (1U << 31) #define RT2860_CAP_START (1 << 30) #define RT2860_MAN_TRIG (1 << 29) #define RT2860_TRIG_OFFSET_SHIFT 16 @@ -381,7 +381,7 @@ #define RT3070_RF_WRITE (1 << 16) /* possible flags for register EFUSE_CTRL */ -#define RT3070_SEL_EFUSE (1 << 31) +#define RT3070_SEL_EFUSE (1U << 31) #define RT3070_EFSROM_KICK (1 << 30) #define RT3070_EFSROM_AIN_MASK 0x03ff0000 #define RT3070_EFSROM_AIN_SHIFT 16 @@ -420,7 +420,7 @@ #define RT2860_BBP_DATA_SHIFT 0 /* possible flags for register RF_CSR_CFG0 */ -#define RT2860_RF_REG_CTRL (1 << 31) +#define RT2860_RF_REG_CTRL (1U << 31) #define RT2860_RF_LE_SEL1 (1 << 30) #define RT2860_RF_LE_STBY (1 << 29) #define RT2860_RF_REG_WIDTH_SHIFT 24 @@ -455,7 +455,7 @@ #define RT2860_SLOT_TIME 0 /* possible flags for register NAV_TIME_CFG */ -#define RT2860_NAV_UPD (1 << 31) +#define RT2860_NAV_UPD (1U << 31) #define RT2860_NAV_UPD_VAL_SHIFT 16 #define RT2860_NAV_CLR_EN (1 << 15) #define RT2860_NAV_TIMER_SHIFT 0 @@ -509,7 +509,7 @@ #define RT2860_WAKEUP_LEAD_TIME_SHIFT 0 /* possible flags for register TX_PIN_CFG */ -#define RT3593_LNA_PE_G2_POL (1 << 31) +#define RT3593_LNA_PE_G2_POL (1U << 31) #define RT3593_LNA_PE_A2_POL (1 << 30) #define RT3593_LNA_PE_G2_EN (1 << 29) #define RT3593_LNA_PE_A2_EN (1 << 28) |
