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authormav <mav@FreeBSD.org>2008-11-30 00:11:48 +0000
committermav <mav@FreeBSD.org>2008-11-30 00:11:48 +0000
commit2d954cfbd6e6e3ebc318ccfdb08e6952ed56f7e1 (patch)
tree650e90cad57be7af293328c883ef9312d3a35d4b /sys/dev/pccbb/pccbb_isa.c
parent750de65ae4e09e2b3fc79cfcf760435b8f078d2f (diff)
downloadFreeBSD-src-2d954cfbd6e6e3ebc318ccfdb08e6952ed56f7e1.zip
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According to "Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant TSC.
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