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authoryongari <yongari@FreeBSD.org>2007-11-06 01:01:38 +0000
committeryongari <yongari@FreeBSD.org>2007-11-06 01:01:38 +0000
commite42f5ebc7bc020f97e048e821dd228efe316238d (patch)
treec242000c001a93158a4e093ed0d38e913e938e36 /sys/dev/nfe
parentc55024b789979f33c87d68c8ec5b9f260f035dc7 (diff)
downloadFreeBSD-src-e42f5ebc7bc020f97e048e821dd228efe316238d.zip
FreeBSD-src-e42f5ebc7bc020f97e048e821dd228efe316238d.tar.gz
Apparently some NVIDIA NICs store ethernet address in reverse order
while other variants have inorder ethernet address for the same chipset. Override ethernet address ordering if we already know how it was stored. This fixes the use of inversed ethernet address on MCP67. Submitted by: ariff MFC after: 3 days
Diffstat (limited to 'sys/dev/nfe')
-rw-r--r--sys/dev/nfe/if_nfe.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/dev/nfe/if_nfe.c b/sys/dev/nfe/if_nfe.c
index edac0fa..3663133 100644
--- a/sys/dev/nfe/if_nfe.c
+++ b/sys/dev/nfe/if_nfe.c
@@ -462,14 +462,14 @@ nfe_attach(device_t dev)
case PCI_PRODUCT_NVIDIA_MCP67_LAN3:
case PCI_PRODUCT_NVIDIA_MCP67_LAN4:
sc->nfe_flags |= NFE_40BIT_ADDR | NFE_PWR_MGMT |
- NFE_TX_FLOW_CTRL;
+ NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL;
break;
case PCI_PRODUCT_NVIDIA_MCP65_LAN1:
case PCI_PRODUCT_NVIDIA_MCP65_LAN2:
case PCI_PRODUCT_NVIDIA_MCP65_LAN3:
case PCI_PRODUCT_NVIDIA_MCP65_LAN4:
sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR |
- NFE_PWR_MGMT | NFE_TX_FLOW_CTRL;
+ NFE_PWR_MGMT | NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL;
break;
}
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