diff options
| author | yongari <yongari@FreeBSD.org> | 2011-05-23 20:18:09 +0000 |
|---|---|---|
| committer | yongari <yongari@FreeBSD.org> | 2011-05-23 20:18:09 +0000 |
| commit | 32741e735e42bb084397320b65c103fb1a44b19a (patch) | |
| tree | 8e460b27b7b14d9b6aba8ee0da0ce44e0e31b8ff /sys/dev/msk/if_msk.c | |
| parent | db83c1dd70b53abc17c065c9f98e145774cb898a (diff) | |
| download | FreeBSD-src-32741e735e42bb084397320b65c103fb1a44b19a.zip FreeBSD-src-32741e735e42bb084397320b65c103fb1a44b19a.tar.gz | |
Do not configure RAM registers for controllers that do not have
them. These registers are defined only for Yukon XL, Yukon EC and
Yukon FE.
Diffstat (limited to 'sys/dev/msk/if_msk.c')
| -rw-r--r-- | sys/dev/msk/if_msk.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/sys/dev/msk/if_msk.c b/sys/dev/msk/if_msk.c index 312e626..e733114 100644 --- a/sys/dev/msk/if_msk.c +++ b/sys/dev/msk/if_msk.c @@ -1300,7 +1300,7 @@ mskc_reset(struct msk_softc *sc) bus_addr_t addr; uint16_t status; uint32_t val; - int i; + int i, initram; CSR_WRITE_2(sc, B0_CTST, CS_RST_CLR); @@ -1396,8 +1396,14 @@ mskc_reset(struct msk_softc *sc) CSR_WRITE_1(sc, GMAC_TI_ST_CTRL, GMT_ST_STOP); CSR_WRITE_1(sc, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); + initram = 0; + if (sc->msk_hw_id == CHIP_ID_YUKON_XL || + sc->msk_hw_id == CHIP_ID_YUKON_EC || + sc->msk_hw_id == CHIP_ID_YUKON_FE) + initram++; + /* Configure timeout values. */ - for (i = 0; i < sc->msk_num_port; i++) { + for (i = 0; initram > 0 && i < sc->msk_num_port; i++) { CSR_WRITE_2(sc, SELECT_RAM_BUFFER(i, B3_RI_CTRL), RI_RST_SET); CSR_WRITE_2(sc, SELECT_RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR); CSR_WRITE_1(sc, SELECT_RAM_BUFFER(i, B3_RI_WTO_R1), |
