summaryrefslogtreecommitdiffstats
path: root/sys/dev/mii/brgphyreg.h
diff options
context:
space:
mode:
authorjkim <jkim@FreeBSD.org>2007-02-13 00:34:32 +0000
committerjkim <jkim@FreeBSD.org>2007-02-13 00:34:32 +0000
commit080df409ce98cc0c8d9b5cf6c12a288d35f0e0c8 (patch)
tree4f284537f04915b5d4a5ed7fc64a5f0b49f68e63 /sys/dev/mii/brgphyreg.h
parent1e089266fce92a82ef9cd101a4972866a67c59de (diff)
downloadFreeBSD-src-080df409ce98cc0c8d9b5cf6c12a288d35f0e0c8.zip
FreeBSD-src-080df409ce98cc0c8d9b5cf6c12a288d35f0e0c8.tar.gz
Fix typos in comments while I am here.
Diffstat (limited to 'sys/dev/mii/brgphyreg.h')
-rw-r--r--sys/dev/mii/brgphyreg.h50
1 files changed, 25 insertions, 25 deletions
diff --git a/sys/dev/mii/brgphyreg.h b/sys/dev/mii/brgphyreg.h
index 60811a1..efb8217 100644
--- a/sys/dev/mii/brgphyreg.h
+++ b/sys/dev/mii/brgphyreg.h
@@ -42,7 +42,7 @@
#define BRGPHY_MII_BMCR 0x00
#define BRGPHY_BMCR_RESET 0x8000
#define BRGPHY_BMCR_LOOP 0x4000
-#define BRGPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */
+#define BRGPHY_BMCR_SPD0 0x2000 /* Speed select, lower bit */
#define BRGPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
#define BRGPHY_BMCR_PDOWN 0x0800 /* Power down */
#define BRGPHY_BMCR_ISO 0x0400 /* Isolate */
@@ -70,16 +70,16 @@
#define BRGPHY_ANAR_RF 0x2000 /* Remote fault */
#define BRGPHY_ANAR_ASP 0x0800 /* Asymmetric Pause */
#define BRGPHY_ANAR_PC 0x0400 /* Pause capable */
-#define BRGPHY_ANAR_SEL 0x001F /* selector field, 00001=Ethernet */
+#define BRGPHY_ANAR_SEL 0x001F /* Selector field, 00001=Ethernet */
#define BRGPHY_MII_ANLPAR 0x05
#define BRGPHY_ANLPAR_NP 0x8000 /* Next page */
#define BRGPHY_ANLPAR_RF 0x2000 /* Remote fault */
#define BRGPHY_ANLPAR_ASP 0x0800 /* Asymmetric Pause */
#define BRGPHY_ANLPAR_PC 0x0400 /* Pause capable */
-#define BRGPHY_ANLPAR_SEL 0x001F /* selector field, 00001=Ethernet */
+#define BRGPHY_ANLPAR_SEL 0x001F /* Selector field, 00001=Ethernet */
-#define BRGPHY_SEL_TYPE 0x0001 /* ethernet */
+#define BRGPHY_SEL_TYPE 0x0001 /* Ethernet */
#define BRGPHY_MII_ANER 0x06
#define BRGPHY_ANER_PDF 0x0010 /* Parallel detection fault */
@@ -93,7 +93,7 @@
#define BRGPHY_MII_NEXTP_LP 0x08 /* Next page of link partner */
#define BRGPHY_MII_1000CTL 0x09 /* 1000baseT control */
-#define BRGPHY_1000CTL_TST 0xE000 /* test modes */
+#define BRGPHY_1000CTL_TST 0xE000 /* Test modes */
#define BRGPHY_1000CTL_MSE 0x1000 /* Master/Slave enable */
#define BRGPHY_1000CTL_MSC 0x0800 /* Master/Slave configuration */
#define BRGPHY_1000CTL_RD 0x0400 /* Repeater/DTE */
@@ -118,7 +118,7 @@
#define BRGPHY_MII_PHY_EXTCTL 0x10 /* PHY extended control */
#define BRGPHY_PHY_EXTCTL_MAC_PHY 0x8000 /* 10BIT/GMI-interface */
#define BRGPHY_PHY_EXTCTL_DIS_CROSS 0x4000 /* Disable MDI crossover */
-#define BRGPHY_PHY_EXTCTL_TX_DIS 0x2000 /* Tx output disable d*/
+#define BRGPHY_PHY_EXTCTL_TX_DIS 0x2000 /* TX output disabled */
#define BRGPHY_PHY_EXTCTL_INT_DIS 0x1000 /* Interrupts disabled */
#define BRGPHY_PHY_EXTCTL_F_INT 0x0800 /* Force interrupt */
#define BRGPHY_PHY_EXTCTL_BY_45 0x0400 /* Bypass 4B5B-Decoder */
@@ -151,7 +151,7 @@
#define BRGPHY_MII_RXERRCNT 0x12 /* RX error counter */
-#define BRGPHY_MII_FCERRCNT 0x13 /* false carrier sense counter */
+#define BRGPHY_MII_FCERRCNT 0x13 /* False carrier sense counter */
#define BGRPHY_FCERRCNT 0x00FF /* False carrier counter */
#define BRGPHY_MII_RXNOCNT 0x14 /* RX not OK counter */
@@ -205,16 +205,16 @@
#define BRGPHY_AUXCTL_DIAG_MODE 0x0004 /* Diagnostic mode */
#define BRGPHY_MII_AUXSTS 0x19 /* AUX status */
-#define BRGPHY_AUXSTS_ACOMP 0x8000 /* autoneg complete */
-#define BRGPHY_AUXSTS_AN_ACK 0x4000 /* autoneg complete ack */
-#define BRGPHY_AUXSTS_AN_ACK_D 0x2000 /* autoneg complete ack detect */
-#define BRGPHY_AUXSTS_AN_NPW 0x1000 /* autoneg next page wait */
-#define BRGPHY_AUXSTS_AN_RES 0x0700 /* AN HDC */
+#define BRGPHY_AUXSTS_ACOMP 0x8000 /* Autoneg complete */
+#define BRGPHY_AUXSTS_AN_ACK 0x4000 /* Autoneg complete ack */
+#define BRGPHY_AUXSTS_AN_ACK_D 0x2000 /* Autoneg complete ack detect */
+#define BRGPHY_AUXSTS_AN_NPW 0x1000 /* Autoneg next page wait */
+#define BRGPHY_AUXSTS_AN_RES 0x0700 /* Autoneg HDC */
#define BRGPHY_AUXSTS_PDF 0x0080 /* Parallel detect. fault */
-#define BRGPHY_AUXSTS_RF 0x0040 /* remote fault */
-#define BRGPHY_AUXSTS_ANP_R 0x0020 /* AN page received */
-#define BRGPHY_AUXSTS_LP_ANAB 0x0010 /* LP AN ability */
-#define BRGPHY_AUXSTS_LP_NPAB 0x0008 /* LP Next page ability */
+#define BRGPHY_AUXSTS_RF 0x0040 /* Remote fault */
+#define BRGPHY_AUXSTS_ANP_R 0x0020 /* Autoneg page received */
+#define BRGPHY_AUXSTS_LP_ANAB 0x0010 /* Link partner autoneg ability */
+#define BRGPHY_AUXSTS_LP_NPAB 0x0008 /* Link partner next page ability */
#define BRGPHY_AUXSTS_LINK 0x0004 /* Link status */
#define BRGPHY_AUXSTS_PRR 0x0002 /* Pause resolution-RX */
#define BRGPHY_AUXSTS_PRT 0x0001 /* Pause resolution-TX */
@@ -227,11 +227,11 @@
#define BRGPHY_RES_10FD 0x0200 /* 10baseT full duplex */
#define BRGPHY_RES_10HD 0x0100 /* 10baseT half duplex */
-#define BRGPHY_MII_ISR 0x1A /* interrupt status */
+#define BRGPHY_MII_ISR 0x1A /* Interrupt status */
#define BRGPHY_ISR_PSERR 0x4000 /* Pair swap error */
#define BRGPHY_ISR_MDXI_SC 0x2000 /* MDIX Status Change */
-#define BRGPHY_ISR_HCT 0x1000 /* counter above 32K */
-#define BRGPHY_ISR_LCT 0x0800 /* all counter below 128 */
+#define BRGPHY_ISR_HCT 0x1000 /* Counter above 32K */
+#define BRGPHY_ISR_LCT 0x0800 /* All counter below 128 */
#define BRGPHY_ISR_AN_PR 0x0400 /* Autoneg page received */
#define BRGPHY_ISR_NO_HDCL 0x0200 /* No HCD Link */
#define BRGPHY_ISR_NO_HDC 0x0100 /* No HCD */
@@ -242,13 +242,13 @@
#define BRGPHY_ISR_DUP_CHG 0x0008 /* Duplex mode change */
#define BRGPHY_ISR_LSP_CHG 0x0004 /* Link speed changed */
#define BRGPHY_ISR_LNK_CHG 0x0002 /* Link status change */
-#define BRGPHY_ISR_CRCERR 0x0001 /* CEC error */
+#define BRGPHY_ISR_CRCERR 0x0001 /* CRC error */
-#define BRGPHY_MII_IMR 0x1B /* interrupt mask */
+#define BRGPHY_MII_IMR 0x1B /* Interrupt mask */
#define BRGPHY_IMR_PSERR 0x4000 /* Pair swap error */
#define BRGPHY_IMR_MDXI_SC 0x2000 /* MDIX Status Change */
-#define BRGPHY_IMR_HCT 0x1000 /* counter above 32K */
-#define BRGPHY_IMR_LCT 0x0800 /* all counter below 128 */
+#define BRGPHY_IMR_HCT 0x1000 /* Counter above 32K */
+#define BRGPHY_IMR_LCT 0x0800 /* All counter below 128 */
#define BRGPHY_IMR_AN_PR 0x0400 /* Autoneg page received */
#define BRGPHY_IMR_NO_HDCL 0x0200 /* No HCD Link */
#define BRGPHY_IMR_NO_HDC 0x0100 /* No HCD */
@@ -259,9 +259,9 @@
#define BRGPHY_IMR_DUP_CHG 0x0008 /* Duplex mode change */
#define BRGPHY_IMR_LSP_CHG 0x0004 /* Link speed changed */
#define BRGPHY_IMR_LNK_CHG 0x0002 /* Link status change */
-#define BRGPHY_IMR_CRCERR 0x0001 /* CEC error */
+#define BRGPHY_IMR_CRCERR 0x0001 /* CRC error */
-#define BRGPHY_MII_TEST1 0x1e
+#define BRGPHY_MII_TEST1 0x1E
#define BRGPHY_TEST1_TRIM_EN 0x0010
#define BRGPHY_TEST1_CRC_EN 0x8000
OpenPOWER on IntegriCloud