- Masking IFM_GMASK when also masking IFM_FDX is redundant and just

  complicates the code.
- Don't let atphy_setmedia() announce PAUSE support for half-duplex when
  MIIF_FORCEPAUSE is set.
- Simplify e1000phy_service() and ip1000phy_service() to only set the
  manual configuration bits once after we have figured them all out. For
  ip1000phy_service() this also means we no longer unnecessarily update
  the hardware along the road.

MFC after:	1 week

1 files changed, 8 insertions, 8 deletions

diff --git a/sys/dev/mii/atphy.c b/sys/dev/mii/atphy.c
index 07847be..6e261a5 100644
--- a/sys/dev/mii/atphy.c
+++ b/sys/dev/mii/atphy.c
@@ -187,9 +187,9 @@ atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 		}
 
 		anar = atphy_anar(ife);
-		if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) {
+		if ((ife->ifm_media & IFM_FDX) != 0) {
 			bmcr |= BMCR_FDX;
-			if (((ife->ifm_media & IFM_GMASK) & IFM_FLOW) != 0 ||
+			if ((ife->ifm_media & IFM_FLOW) != 0 ||
 			    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
 				anar |= ANAR_PAUSE_TOWARDS;
 		}
@@ -371,7 +371,7 @@ atphy_anar(struct ifmedia_entry *ife)
 		return (0);
 	}
 
-	if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) {
+	if ((ife->ifm_media & IFM_FDX) != 0) {
 		if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX)
 			anar |= ANAR_TX_FD;
 		else
@@ -387,13 +387,13 @@ atphy_setmedia(struct mii_softc *sc, int media)
 	uint16_t anar;
 
 	anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
-	if (((IFM_SUBTYPE(media) == IFM_AUTO ||
-	    ((media & IFM_GMASK) & IFM_FDX) != 0) &&
-	    ((media & IFM_GMASK) & IFM_FLOW) != 0) ||
-	    (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
+	if ((IFM_SUBTYPE(media) == IFM_AUTO || (media & IFM_FDX) != 0) &&
+	    ((media & IFM_FLOW) != 0 ||
+	    (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
 		anar |= ANAR_PAUSE_TOWARDS;
 	PHY_WRITE(sc, MII_ANAR, anar);
-	if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
+	if ((sc->mii_extcapabilities &
+	     (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
 		PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX |
 		    GTCR_ADV_1000THDX);
 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);