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authormarius <marius@FreeBSD.org>2009-12-25 22:53:46 +0000
committermarius <marius@FreeBSD.org>2009-12-25 22:53:46 +0000
commit2b2ab161211ea3caf90b307e431dfe38db75a95e (patch)
tree0e04c69f69869c6c5111bd1952ca8d6da2e21187 /sys/dev/mc146818
parentfafe874fa56eac30f631a1455711edb3249c9fc2 (diff)
downloadFreeBSD-src-2b2ab161211ea3caf90b307e431dfe38db75a95e.zip
FreeBSD-src-2b2ab161211ea3caf90b307e431dfe38db75a95e.tar.gz
Style changes
Obtained from: NetBSD (mc146818reg.h)
Diffstat (limited to 'sys/dev/mc146818')
-rw-r--r--sys/dev/mc146818/mc146818.c9
-rw-r--r--sys/dev/mc146818/mc146818reg.h22
-rw-r--r--sys/dev/mc146818/mc146818var.h25
3 files changed, 31 insertions, 25 deletions
diff --git a/sys/dev/mc146818/mc146818.c b/sys/dev/mc146818/mc146818.c
index ea59d2c..53fe5da 100644
--- a/sys/dev/mc146818/mc146818.c
+++ b/sys/dev/mc146818/mc146818.c
@@ -94,7 +94,7 @@ mc146818_attach(device_t dev)
(*sc->sc_mcwrite)(dev, MC_REGB, sc->sc_regb);
mtx_unlock_spin(&sc->sc_mtx);
- clock_register(dev, 1000000); /* 1 second resolution. */
+ clock_register(dev, 1000000); /* 1 second resolution */
return (0);
}
@@ -116,7 +116,7 @@ mc146818_gettime(device_t dev, struct timespec *ts)
/*
* If MC_REGA_UIP is 0 we have at least 244us before the next
- * update. If it's 1 an update is imminent.
+ * update. If it's 1 an update is imminent.
*/
for (;;) {
mtx_lock_spin(&sc->sc_mtx);
@@ -260,6 +260,9 @@ mc146818_def_write(device_t dev, u_int reg, u_int val)
bus_space_write_1(sc->sc_bst, sc->sc_bsh, MC_DATA, val);
}
+#undef MC_ADDR
+#undef MC_DATA
+
/*
* Looks like it's common even across platforms to store the century at
* 0x32 in the NVRAM of the mc146818.
@@ -283,3 +286,5 @@ mc146818_def_setcent(device_t dev, u_int cent)
sc = device_get_softc(dev);
(*sc->sc_mcwrite)(dev, MC_CENT, cent);
}
+
+#undef MC_CENT
diff --git a/sys/dev/mc146818/mc146818reg.h b/sys/dev/mc146818/mc146818reg.h
index 7e17aa2..811187e 100644
--- a/sys/dev/mc146818/mc146818reg.h
+++ b/sys/dev/mc146818/mc146818reg.h
@@ -1,17 +1,17 @@
/*-
* Copyright (c) 1995 Carnegie-Mellon University.
* All rights reserved.
- *
+ *
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
+ *
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
@@ -22,7 +22,7 @@
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*
- * from: NetBSD: mc146818reg.h,v 1.5 2003/11/02 11:07:45 wiz Exp
+ * $NetBSD: mc146818reg.h,v 1.9 2006/03/08 23:46:25 lukem Exp $
*
* $FreeBSD$
*/
@@ -122,8 +122,8 @@
* Periodic Interrupt Rate Select constants (Control register A)
*/
#define MC_RATE_NONE 0x0 /* No periodic interrupt */
-#define MC_RATE_1 0x1 /* 256 Hz if MC_BASE_32_KHz, else 32768 Hz */
-#define MC_RATE_2 0x2 /* 128 Hz if MC_BASE_32_KHz, else 16384 Hz */
+#define MC_RATE_1 0x1 /* 256 Hz if MC_BASE_32_KHz, else 32768 Hz */
+#define MC_RATE_2 0x2 /* 128 Hz if MC_BASE_32_KHz, else 16384 Hz */
#define MC_RATE_8192_Hz 0x3 /* 122.070 us period */
#define MC_RATE_4096_Hz 0x4 /* 244.141 us period */
#define MC_RATE_2048_Hz 0x5 /* 488.281 us period */
@@ -141,8 +141,8 @@
/*
* Time base (divisor select) constants (Control register A)
*/
-#define MC_BASE_4_MHz 0x00 /* 4MHz crystal */
-#define MC_BASE_1_MHz MC_REGA_DV0 /* 1MHz crystal */
-#define MC_BASE_32_KHz MC_REGA_DV1 /* 32KHz crystal */
+#define MC_BASE_4_MHz 0x00 /* 4 MHz crystal */
+#define MC_BASE_1_MHz MC_REGA_DV0 /* 1 MHz crystal */
+#define MC_BASE_32_KHz MC_REGA_DV1 /* 32 KHz crystal */
#define MC_BASE_NONE (MC_REGA_DV2 | MC_REGA_DV1) /* actually also resets */
#define MC_BASE_RESET (MC_REGA_DV2 | MC_REGA_DV1 | MC_REGA_DV0)
diff --git a/sys/dev/mc146818/mc146818var.h b/sys/dev/mc146818/mc146818var.h
index cce9508..d54f53e 100644
--- a/sys/dev/mc146818/mc146818var.h
+++ b/sys/dev/mc146818/mc146818var.h
@@ -38,29 +38,30 @@ struct mc146818_softc {
u_char sc_regb; /* register B */
u_int sc_year0; /* year counter offset */
+
u_int sc_flag; /* MD flags */
-#define MC146818_NO_CENT_ADJUST 0x0001 /* don't adjust century */
-#define MC146818_BCD 0x0002 /* use BCD mode */
-#define MC146818_12HR 0x0004 /* use AM/PM mode */
+#define MC146818_NO_CENT_ADJUST 0x0001 /* don't adjust century */
+#define MC146818_BCD 0x0002 /* use BCD mode */
+#define MC146818_12HR 0x0004 /* use AM/PM mode */
/* MD chip register read/write functions */
- u_int (*sc_mcread)(device_t, u_int);
- void (*sc_mcwrite)(device_t, u_int, u_int);
+ u_int (*sc_mcread)(device_t dev, u_int reg);
+ void (*sc_mcwrite)(device_t dev, u_int reg, u_int val);
/* MD century get/set functions */
- u_int (*sc_getcent)(device_t);
- void (*sc_setcent)(device_t, u_int);
+ u_int (*sc_getcent)(device_t dev);
+ void (*sc_setcent)(device_t dev, u_int cent);
};
/* Default read/write functions */
-u_int mc146818_def_read(device_t, u_int);
-void mc146818_def_write(device_t, u_int, u_int);
+u_int mc146818_def_read(device_t dev, u_int reg);
+void mc146818_def_write(device_t dev, u_int reg, u_int val);
/* Chip attach function */
int mc146818_attach(device_t);
/* Methods for the clock interface */
#ifdef notyet
-int mc146818_getsecs(device_t, int *);
+int mc146818_getsecs(device_t dev, int *secp);
#endif
-int mc146818_gettime(device_t, struct timespec *);
-int mc146818_settime(device_t, struct timespec *);
+int mc146818_gettime(device_t dev, struct timespec *ts);
+int mc146818_settime(device_t dev, struct timespec *ts);
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