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| author | jkim <jkim@FreeBSD.org> | 2006-07-06 21:12:18 +0000 |
|---|---|---|
| committer | jkim <jkim@FreeBSD.org> | 2006-07-06 21:12:18 +0000 |
| commit | c025122efb4887b6cf1e73d8e13340215ee870fa (patch) | |
| tree | 5f5c8e0ac7c41fc6eb82da090f253cdb4051c7b4 /sys/dev/ic | |
| parent | 3f67fc0a689b5565e39164dca8f10f2a585b89ea (diff) | |
| download | FreeBSD-src-c025122efb4887b6cf1e73d8e13340215ee870fa.zip FreeBSD-src-c025122efb4887b6cf1e73d8e13340215ee870fa.tar.gz | |
Enhanced floppy controllers have Data Rate Select Register (DSR) at 0x3f4.
Use it to reset controller and to select data rate. According to Intel
80277AA datasheet, software reset behaves the same as DOR reset except
that it is self clearing. National Semiconductor PC8477B datasheet says
the same. As a side effect, we no longer use Configuration Control
Register (CCR) at 0x3f7 for these controllers, which is often missing
in modern hardware.
Diffstat (limited to 'sys/dev/ic')
| -rw-r--r-- | sys/dev/ic/nec765.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sys/dev/ic/nec765.h b/sys/dev/ic/nec765.h index 1e0561a..9851685 100644 --- a/sys/dev/ic/nec765.h +++ b/sys/dev/ic/nec765.h @@ -90,6 +90,12 @@ #define NE7_ST3_HD 0x04 /* upper head select */ #define NE7_ST3_US 0x03 /* unit select */ +/* Data Rate Select Register DSR (enhanced controller) */ +#define I8207X_DSR_SR 0x80 /* software reset */ +#define I8207X_DSR_LP 0x40 /* low power */ +#define I8207X_DSR_PS 0x1c /* precompensation select */ +#define I8207X_DSR_RS 0x03 /* data rate select */ + /* Commands */ /* * the top three bits -- where appropriate -- are set as follows: |
