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| author | marius <marius@FreeBSD.org> | 2005-05-20 12:37:16 +0000 |
|---|---|---|
| committer | marius <marius@FreeBSD.org> | 2005-05-20 12:37:16 +0000 |
| commit | 09048a93b2cd86efc956a0d933ac992562b87859 (patch) | |
| tree | 9745d51e86dd4814dc7e52df0fb248183656cd0a /sys/dev/firewire | |
| parent | a74a3160f2b77dde29853a0366d865e72c4cb828 (diff) | |
| download | FreeBSD-src-09048a93b2cd86efc956a0d933ac992562b87859.zip FreeBSD-src-09048a93b2cd86efc956a0d933ac992562b87859.tar.gz | |
Recognize the integrated (though not necessarily enabled) FireWire
controllers of Sun PCIO-2 chips which are used onboard in most of
the newer PCI-based sun4u machines (cosmetic change as they were also
already probed as generic FWOHCI without this). As with gem(4), hme(4)
and ohci(4) detect whether their intpin register is valid and correct
it if necessary, i.e. set the respective IVAR to the right value for
allocating the IRQ resource, as some of them come up having it set
to 0 (in fact in all machines I'm currently aware of the FireWire
part being enabled). This fixes attaching affected controllers.
Apporved by: simokawa
Tested by: Michiel Boland <michiel@boland.org>
MFC after: 1 month
Diffstat (limited to 'sys/dev/firewire')
| -rw-r--r-- | sys/dev/firewire/fwohci_pci.c | 12 | ||||
| -rw-r--r-- | sys/dev/firewire/fwohcireg.h | 2 |
2 files changed, 14 insertions, 0 deletions
diff --git a/sys/dev/firewire/fwohci_pci.c b/sys/dev/firewire/fwohci_pci.c index a9d0dde..f584b98 100644 --- a/sys/dev/firewire/fwohci_pci.c +++ b/sys/dev/firewire/fwohci_pci.c @@ -208,6 +208,10 @@ fwohci_pci_probe( device_t dev ) device_set_desc(dev, "Adaptec AHA-894x/AIC-5800"); return BUS_PROBE_DEFAULT; } + if (id == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW)) { + device_set_desc(dev, "Sun PCIO-2"); + return BUS_PROBE_DEFAULT; + } #endif if (pci_get_class(dev) == PCIC_SERIALBUS && pci_get_subclass(dev) == PCIS_SERIALBUS_FW @@ -245,6 +249,14 @@ fwohci_pci_init(device_t self) #endif pci_write_config(self, PCIR_COMMAND, cmd, 2); + /* + * Some Sun PCIO-2 FireWire controllers have their intpin register + * bogusly set to 0, although it should be 3. Correct that. + */ + if (pci_get_devid(self) == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW) && + pci_get_intpin(self) == 0) + pci_set_intpin(self, 3); + latency = olatency = pci_read_config(self, PCIR_LATTIMER, 1); #define DEF_LATENCY 0x20 if (olatency < DEF_LATENCY) { diff --git a/sys/dev/firewire/fwohcireg.h b/sys/dev/firewire/fwohcireg.h index 3998622..2cccb25 100644 --- a/sys/dev/firewire/fwohcireg.h +++ b/sys/dev/firewire/fwohcireg.h @@ -47,6 +47,7 @@ #define FW_VENDORID_LUCENT 0x11c1 #define FW_VENDORID_INTEL 0x8086 #define FW_VENDORID_ADAPTEC 0x9004 +#define FW_VENDORID_SUN 0x108e #define FW_DEVICE_CS4210 (0x000f << 16) #define FW_DEVICE_UPD861 (0x0063 << 16) @@ -76,6 +77,7 @@ #define FW_DEVICE_FW322 (0x5811 << 16) #define FW_DEVICE_7007 (0x7007 << 16) #define FW_DEVICE_82372FB (0x7605 << 16) +#define FW_DEVICE_PCIO2FW (0x1102 << 16) #define PCI_INTERFACE_OHCI 0x10 |
