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| author | dumbbell <dumbbell@FreeBSD.org> | 2015-03-17 18:50:33 +0000 |
|---|---|---|
| committer | dumbbell <dumbbell@FreeBSD.org> | 2015-03-17 18:50:33 +0000 |
| commit | e6c59cd5c0a9bdd620ac9b2c7220814bd7d9d0eb (patch) | |
| tree | 4cd126feba58bdd5146facab6c5499f8a7f11467 /sys/dev/drm2/radeon | |
| parent | 06710b088448f3def482afa52f72ce3aac5cb61a (diff) | |
| download | FreeBSD-src-e6c59cd5c0a9bdd620ac9b2c7220814bd7d9d0eb.zip FreeBSD-src-e6c59cd5c0a9bdd620ac9b2c7220814bd7d9d0eb.tar.gz | |
drm: Update the device-independent code to match Linux 3.8.13
This update brings few features:
o Support for the setmaster/dropmaster ioctls. For instance, they
are used to run multiple X servers simultaneously.
o Support for minor devices. The only user-visible change is a new
entry in /dev/dri but it is useless at the moment. This is a
first step to support render nodes [1].
The main benefit is to greatly reduce the diff with Linux (at the
expense of an unreadable commit diff). Hopefully, next upgrades will be
easier.
No updates were made to the drivers, beside adapting them to API
changes.
[1] https://en.wikipedia.org/wiki/Direct_Rendering_Manager#Render_nodes
Tested by: Many people
MFC after: 1 month
Relnotes: yes
Diffstat (limited to 'sys/dev/drm2/radeon')
72 files changed, 1320 insertions, 1432 deletions
diff --git a/sys/dev/drm2/radeon/atom.c b/sys/dev/drm2/radeon/atom.c index 7cecd07..f4ca5e9 100644 --- a/sys/dev/drm2/radeon/atom.c +++ b/sys/dev/drm2/radeon/atom.c @@ -661,9 +661,9 @@ static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg) unsigned count = U8((*ptr)++); ATOM_SDEBUG_PRINT(" count: %d\n", count); if (arg == ATOM_UNIT_MICROSEC) - DRM_UDELAY(count); + udelay(count); else if (!drm_can_sleep()) - DRM_MDELAY(count); + mdelay(count); else DRM_MSLEEP(count); } @@ -1178,7 +1178,7 @@ static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32 ectx.abort = false; ectx.last_jump = 0; if (ws) - ectx.ws = malloc(4 * ws, DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + ectx.ws = malloc(4 * ws, DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); else ectx.ws = NULL; @@ -1234,7 +1234,7 @@ static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; static void atom_index_iio(struct atom_context *ctx, int base) { - ctx->iio = malloc(2 * 256, DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + ctx->iio = malloc(2 * 256, DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); while (CU8(base) == ATOM_IIO_START) { ctx->iio[CU8(base + 1)] = base + 2; base += 2; @@ -1248,7 +1248,7 @@ struct atom_context *atom_parse(struct card_info *card, void *bios) { int base; struct atom_context *ctx = - malloc(sizeof(struct atom_context), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + malloc(sizeof(struct atom_context), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); char *str; char name[512]; int i; @@ -1386,16 +1386,16 @@ int atom_allocate_fb_scratch(struct atom_context *ctx) firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset); DRM_DEBUG("atom firmware requested %08x %dkb\n", - firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware, - firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb); + le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware), + le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb)); - usage_bytes = firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb * 1024; + usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024; } ctx->scratch_size_bytes = 0; if (usage_bytes == 0) usage_bytes = 20 * 1024; /* allocate some scratch memory */ - ctx->scratch = malloc(usage_bytes, DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + ctx->scratch = malloc(usage_bytes, DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!ctx->scratch) return -ENOMEM; ctx->scratch_size_bytes = usage_bytes; diff --git a/sys/dev/drm2/radeon/atombios_crtc.c b/sys/dev/drm2/radeon/atombios_crtc.c index c4c5c46..0be4cf2 100644 --- a/sys/dev/drm2/radeon/atombios_crtc.c +++ b/sys/dev/drm2/radeon/atombios_crtc.c @@ -256,8 +256,6 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) radeon_crtc->enabled = true; /* adjust pm to dpms changes BEFORE enabling crtcs */ radeon_pm_compute_clocks(rdev); - if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) - atombios_powergate_crtc(crtc, ATOM_DISABLE); atombios_enable_crtc(crtc, ATOM_ENABLE); if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev)) atombios_enable_crtc_memreq(crtc, ATOM_ENABLE); @@ -275,8 +273,6 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) atombios_enable_crtc_memreq(crtc, ATOM_DISABLE); atombios_enable_crtc(crtc, ATOM_DISABLE); radeon_crtc->enabled = false; - if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) - atombios_powergate_crtc(crtc, ATOM_ENABLE); /* adjust pm to dpms changes AFTER disabling crtcs */ radeon_pm_compute_clocks(rdev); break; @@ -565,6 +561,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, /* use frac fb div on APUs */ if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; + /* use frac fb div on RS780/RS880 */ + if ((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880)) + radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; if (ASIC_IS_DCE32(rdev) && mode->clock > 165000) radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV; } else { @@ -1848,6 +1847,8 @@ static void atombios_crtc_disable(struct drm_crtc *crtc) int i; atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); + if (ASIC_IS_DCE6(rdev)) + atombios_powergate_crtc(crtc, ATOM_ENABLE); for (i = 0; i < rdev->num_crtc; i++) { if (rdev->mode_info.crtcs[i] && diff --git a/sys/dev/drm2/radeon/atombios_dp.c b/sys/dev/drm2/radeon/atombios_dp.c index f92df62..1a3f4e1 100644 --- a/sys/dev/drm2/radeon/atombios_dp.c +++ b/sys/dev/drm2/radeon/atombios_dp.c @@ -140,7 +140,7 @@ static int radeon_dp_aux_native_write(struct radeon_connector *radeon_connector, if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) return send_bytes; else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER) - DRM_UDELAY(400); + udelay(400); else return -EIO; } @@ -173,7 +173,7 @@ static int radeon_dp_aux_native_read(struct radeon_connector *radeon_connector, if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) return ret; else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER) - DRM_UDELAY(400); + udelay(400); else if (ret == 0) return -EPROTO; else @@ -261,7 +261,7 @@ int radeon_dp_i2c_aux_ch(device_t dev, int mode, u8 write_byte, u8 *read_byte) return -EREMOTEIO; case AUX_NATIVE_REPLY_DEFER: DRM_DEBUG_KMS("aux_ch native defer\n"); - DRM_UDELAY(400); + udelay(400); continue; default: DRM_ERROR("aux_ch invalid native reply 0x%02x\n", ack); @@ -272,13 +272,13 @@ int radeon_dp_i2c_aux_ch(device_t dev, int mode, u8 write_byte, u8 *read_byte) case AUX_I2C_REPLY_ACK: if (mode == MODE_I2C_READ) *read_byte = reply[0]; - return (0); /* Return ret on Linux. */ + return ret; case AUX_I2C_REPLY_NACK: DRM_DEBUG_KMS("aux_i2c nack\n"); return -EREMOTEIO; case AUX_I2C_REPLY_DEFER: DRM_DEBUG_KMS("aux_i2c defer\n"); - DRM_UDELAY(400); + udelay(400); break; default: DRM_ERROR("aux_i2c invalid reply 0x%02x\n", ack); @@ -685,7 +685,7 @@ static int radeon_dp_link_train_init(struct radeon_dp_link_train_info *dp_info) static int radeon_dp_link_train_finish(struct radeon_dp_link_train_info *dp_info) { - DRM_UDELAY(400); + udelay(400); /* disable the training pattern on the sink */ radeon_write_dpcd_reg(dp_info->radeon_connector, @@ -713,7 +713,7 @@ static int radeon_dp_link_train_cr(struct radeon_dp_link_train_info *dp_info) memset(dp_info->train_set, 0, 4); radeon_dp_update_vs_emph(dp_info); - DRM_UDELAY(400); + udelay(400); /* clock recovery loop */ clock_recovery = false; diff --git a/sys/dev/drm2/radeon/atombios_encoders.c b/sys/dev/drm2/radeon/atombios_encoders.c index 9128aac..3ee6fc5 100644 --- a/sys/dev/drm2/radeon/atombios_encoders.c +++ b/sys/dev/drm2/radeon/atombios_encoders.c @@ -197,7 +197,7 @@ void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) return; - pdata = malloc(sizeof(struct radeon_backlight_privdata), DRM_MEM_DRIVER, M_WAITOK); + pdata = malloc(sizeof(struct radeon_backlight_privdata), DRM_MEM_DRIVER, M_NOWAIT); if (!pdata) { DRM_ERROR("Memory allocation failed\n"); goto error; @@ -279,6 +279,12 @@ static void radeon_atom_backlight_exit(struct radeon_encoder *encoder) #endif +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +/* evil but including atombios.h is much worse */ +bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, + struct drm_display_mode *mode); +#endif + static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder) { @@ -302,7 +308,7 @@ static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder) } static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, - struct drm_display_mode *mode, + const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); @@ -1342,7 +1348,7 @@ atombios_set_edp_panel_power(struct drm_connector *connector, int action) for (i = 0; i < 300; i++) { if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) return true; - DRM_MDELAY(1); + mdelay(1); } return false; } @@ -2451,7 +2457,7 @@ radeon_atom_ext_dpms(struct drm_encoder *encoder, int mode) } static bool radeon_atom_ext_mode_fixup(struct drm_encoder *encoder, - struct drm_display_mode *mode, + const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { return true; @@ -2506,7 +2512,7 @@ radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder) struct drm_device *dev = radeon_encoder->base.dev; struct radeon_device *rdev = dev->dev_private; struct radeon_encoder_atom_dac *dac = malloc(sizeof(struct radeon_encoder_atom_dac), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!dac) return NULL; @@ -2520,7 +2526,7 @@ radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder) { int encoder_enum = (radeon_encoder->encoder_enum & ENUM_ID_MASK) >> ENUM_ID_SHIFT; struct radeon_encoder_atom_dig *dig = malloc(sizeof(struct radeon_encoder_atom_dig), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!dig) return NULL; @@ -2559,7 +2565,7 @@ radeon_add_atom_encoder(struct drm_device *dev, /* add a new one */ radeon_encoder = malloc(sizeof(struct radeon_encoder), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_encoder) return; diff --git a/sys/dev/drm2/radeon/atombios_i2c.c b/sys/dev/drm2/radeon/atombios_i2c.c index 40ba15b..fb57ff9 100644 --- a/sys/dev/drm2/radeon/atombios_i2c.c +++ b/sys/dev/drm2/radeon/atombios_i2c.c @@ -60,10 +60,17 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, if (flags & HW_I2C_WRITE) { if (num > ATOM_MAX_HW_I2C_WRITE) { DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 2)\n", num); - return EINVAL; + return -EINVAL; } memcpy(&out, buf, num); args.lpI2CDataOut = cpu_to_le16(out); + } else { +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ + if (num > ATOM_MAX_HW_I2C_READ) { + DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num); + return -EINVAL; + } +#endif } args.ucI2CSpeed = TARGET_HW_I2C_CLOCK; @@ -77,7 +84,7 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, /* error */ if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) { DRM_DEBUG_KMS("hw_i2c error\n"); - return EIO; + return -EIO; } if (!(flags & HW_I2C_WRITE)) @@ -101,9 +108,9 @@ radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num) p->slave, HW_I2C_WRITE, &buf, 1); if (ret) - return ret; + return -ret; /* "ret" is returned on Linux. */ else - return (0); + return (0); /* "num" is returned on Linux. */ } for (i = 0; i < num; i++) { @@ -127,13 +134,13 @@ radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num) p->slave, flags, &p->buf[buffer_offset], current_count); if (ret) - return ret; + return -ret; /* "ret" is returned on Linux. */ remaining -= current_count; buffer_offset += current_count; } } - return (0); + return (0); /* "num" is returned on Linux. */ } static int diff --git a/sys/dev/drm2/radeon/cayman_blit_shaders.c b/sys/dev/drm2/radeon/cayman_blit_shaders.c index 779f305..6130250 100644 --- a/sys/dev/drm2/radeon/cayman_blit_shaders.c +++ b/sys/dev/drm2/radeon/cayman_blit_shaders.c @@ -370,6 +370,6 @@ const u32 cayman_ps[] = 0x00000000, }; -const u32 cayman_ps_size = DRM_ARRAY_SIZE(cayman_ps); -const u32 cayman_vs_size = DRM_ARRAY_SIZE(cayman_vs); -const u32 cayman_default_size = DRM_ARRAY_SIZE(cayman_default_state); +const u32 cayman_ps_size = ARRAY_SIZE(cayman_ps); +const u32 cayman_vs_size = ARRAY_SIZE(cayman_vs); +const u32 cayman_default_size = ARRAY_SIZE(cayman_default_state); diff --git a/sys/dev/drm2/radeon/evergreen.c b/sys/dev/drm2/radeon/evergreen.c index 3c98d53..4643d62 100644 --- a/sys/dev/drm2/radeon/evergreen.c +++ b/sys/dev/drm2/radeon/evergreen.c @@ -49,7 +49,14 @@ static const u32 crtc_offsets[6] = }; static void evergreen_gpu_init(struct radeon_device *rdev); +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +void evergreen_fini(struct radeon_device *rdev); +#endif void evergreen_pcie_gen2_enable(struct radeon_device *rdev); +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +extern void cayman_cp_int_cntl_setup(struct radeon_device *rdev, + int ring, u32 cp_int_cntl); +#endif void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, unsigned *bankh, unsigned *mtaspect, @@ -107,6 +114,27 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) } } +static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc) +{ + if (RREG32(EVERGREEN_CRTC_STATUS + crtc_offsets[crtc]) & EVERGREEN_CRTC_V_BLANK) + return true; + else + return false; +} + +static bool dce4_is_counter_moving(struct radeon_device *rdev, int crtc) +{ + u32 pos1, pos2; + + pos1 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]); + pos2 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]); + + if (pos1 != pos2) + return true; + else + return false; +} + /** * dce4_wait_for_vblank - vblank wait asic callback. * @@ -117,21 +145,28 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) */ void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc) { - int i; + unsigned i = 0; if (crtc >= rdev->num_crtc) return; - if (RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[crtc]) & EVERGREEN_CRTC_MASTER_EN) { - for (i = 0; i < rdev->usec_timeout; i++) { - if (!(RREG32(EVERGREEN_CRTC_STATUS + crtc_offsets[crtc]) & EVERGREEN_CRTC_V_BLANK)) + if (!(RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[crtc]) & EVERGREEN_CRTC_MASTER_EN)) + return; + + /* depending on when we hit vblank, we may be close to active; if so, + * wait for another frame. + */ + while (dce4_is_in_vblank(rdev, crtc)) { + if (i++ % 100 == 0) { + if (!dce4_is_counter_moving(rdev, crtc)) break; - DRM_UDELAY(1); } - for (i = 0; i < rdev->usec_timeout; i++) { - if (RREG32(EVERGREEN_CRTC_STATUS + crtc_offsets[crtc]) & EVERGREEN_CRTC_V_BLANK) + } + + while (!dce4_is_in_vblank(rdev, crtc)) { + if (i++ % 100 == 0) { + if (!dce4_is_counter_moving(rdev, crtc)) break; - DRM_UDELAY(1); } } } @@ -204,7 +239,7 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) for (i = 0; i < rdev->usec_timeout; i++) { if (RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & EVERGREEN_GRPH_SURFACE_UPDATE_PENDING) break; - DRM_UDELAY(1); + udelay(1); } DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n"); @@ -405,6 +440,19 @@ void evergreen_pm_misc(struct radeon_device *rdev) rdev->pm.current_vddc = voltage->voltage; DRM_DEBUG("Setting: vddc: %d\n", voltage->voltage); } + + /* starting with BTC, there is one state that is used for both + * MH and SH. Difference is that we always use the high clock index for + * mclk and vddci. + */ + if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && + (rdev->family >= CHIP_BARTS) && + rdev->pm.active_crtc_count && + ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || + (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) + voltage = &rdev->pm.power_state[req_ps_idx]. + clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].voltage; + /* 0xff01 is a flag rather then an actual voltage */ if (voltage->vddci == 0xff01) return; @@ -597,6 +645,16 @@ void evergreen_hpd_init(struct radeon_device *rdev) list_for_each_entry(connector, &dev->mode_config.connector_list, head) { struct radeon_connector *radeon_connector = to_radeon_connector(connector); + + if (connector->connector_type == DRM_MODE_CONNECTOR_eDP || + connector->connector_type == DRM_MODE_CONNECTOR_LVDS) { + /* don't try to enable hpd on eDP or LVDS avoid breaking the + * aux dp channel on imac and help (but not completely fix) + * https://bugzilla.redhat.com/show_bug.cgi?id=726143 + * also avoid interrupt storms during dpms. + */ + continue; + } switch (radeon_connector->hpd.hpd) { case RADEON_HPD_1: WREG32(DC_HPD1_CONTROL, tmp); @@ -1146,7 +1204,7 @@ int evergreen_mc_wait_for_idle(struct radeon_device *rdev) tmp = RREG32(SRBM_STATUS) & 0x1F00; if (!tmp) return 0; - DRM_UDELAY(1); + udelay(1); } return -1; } @@ -1173,7 +1231,7 @@ void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev) if (tmp) { return; } - DRM_UDELAY(1); + udelay(1); } } @@ -1314,17 +1372,16 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); if (!(tmp & EVERGREEN_CRTC_BLANK_DATA_EN)) { radeon_wait_for_vblank(rdev, i); - tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); + tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp); - WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0); } } else { tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); if (!(tmp & EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE)) { radeon_wait_for_vblank(rdev, i); - tmp |= EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE; WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); + tmp |= EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE; WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp); WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0); } @@ -1334,8 +1391,17 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav for (j = 0; j < rdev->usec_timeout; j++) { if (radeon_get_vblank_counter(rdev, i) != frame_count) break; - DRM_UDELAY(1); + udelay(1); } + + /* XXX this is a hack to avoid strange behavior with EFI on certain systems */ + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); + tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); + tmp &= ~EVERGREEN_CRTC_MASTER_EN; + WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp); + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0); + save->crtc_enabled[i] = false; + /* ***** */ } else { save->crtc_enabled[i] = false; } @@ -1352,7 +1418,23 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav WREG32(MC_SHARED_BLACKOUT_CNTL, blackout | 1); } /* wait for the MC to settle */ - DRM_UDELAY(100); + udelay(100); + + /* lock double buffered regs */ + for (i = 0; i < rdev->num_crtc; i++) { + if (save->crtc_enabled[i]) { + tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]); + if (!(tmp & EVERGREEN_GRPH_UPDATE_LOCK)) { + tmp |= EVERGREEN_GRPH_UPDATE_LOCK; + WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp); + } + tmp = RREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i]); + if (!(tmp & 1)) { + tmp |= 1; + WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp); + } + } + } } void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save) @@ -1374,6 +1456,33 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start)); WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start); + /* unlock regs and wait for update */ + for (i = 0; i < rdev->num_crtc; i++) { + if (save->crtc_enabled[i]) { + tmp = RREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i]); + if ((tmp & 0x3) != 0) { + tmp &= ~0x3; + WREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i], tmp); + } + tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]); + if (tmp & EVERGREEN_GRPH_UPDATE_LOCK) { + tmp &= ~EVERGREEN_GRPH_UPDATE_LOCK; + WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp); + } + tmp = RREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i]); + if (tmp & 1) { + tmp &= ~1; + WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp); + } + for (j = 0; j < rdev->usec_timeout; j++) { + tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]); + if ((tmp & EVERGREEN_GRPH_SURFACE_UPDATE_PENDING) == 0) + break; + udelay(1); + } + } + } + /* unblackout the MC */ tmp = RREG32(MC_SHARED_BLACKOUT_CNTL); tmp &= ~BLACKOUT_MODE_MASK; @@ -1401,13 +1510,13 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s for (j = 0; j < rdev->usec_timeout; j++) { if (radeon_get_vblank_counter(rdev, i) != frame_count) break; - DRM_UDELAY(1); + udelay(1); } } } /* Unlock vga access */ WREG32(VGA_HDP_CONTROL, save->vga_hdp_control); - DRM_MDELAY(1); + mdelay(1); WREG32(VGA_RENDER_CONTROL, save->vga_render_control); } @@ -1639,7 +1748,7 @@ static int evergreen_cp_resume(struct radeon_device *rdev) SOFT_RESET_SPI | SOFT_RESET_SX)); RREG32(GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(GRBM_SOFT_RESET, 0); RREG32(GRBM_SOFT_RESET); @@ -1675,7 +1784,7 @@ static int evergreen_cp_resume(struct radeon_device *rdev) WREG32(SCRATCH_UMSK, 0); } - DRM_MDELAY(1); + mdelay(1); WREG32(CP_RB_CNTL, tmp); WREG32(CP_RB_BASE, ring->gpu_addr >> 8); @@ -2247,7 +2356,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); - DRM_UDELAY(50); + udelay(50); } @@ -2373,7 +2482,7 @@ static void evergreen_gpu_soft_reset_gfx(struct radeon_device *rdev) dev_info(rdev->dev, " GRBM_SOFT_RESET=0x%08X\n", grbm_reset); WREG32(GRBM_SOFT_RESET, grbm_reset); (void)RREG32(GRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(GRBM_SOFT_RESET, 0); (void)RREG32(GRBM_SOFT_RESET); @@ -2413,7 +2522,7 @@ static void evergreen_gpu_soft_reset_dma(struct radeon_device *rdev) /* Reset dma */ WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA); RREG32(SRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(SRBM_SOFT_RESET, 0); dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n", @@ -2447,7 +2556,7 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) evergreen_gpu_soft_reset_dma(rdev); /* Wait a little for things to settle down */ - DRM_UDELAY(50); + udelay(50); evergreen_mc_resume(rdev, &save); return 0; @@ -2871,7 +2980,7 @@ static void evergreen_irq_disable(struct radeon_device *rdev) { r600_disable_interrupts(rdev); /* Wait and acknowledge irq */ - DRM_MDELAY(1); + mdelay(1); evergreen_irq_ack(rdev); evergreen_disable_interrupt_state(rdev); } diff --git a/sys/dev/drm2/radeon/evergreen_blit_shaders.c b/sys/dev/drm2/radeon/evergreen_blit_shaders.c index 6db3cef..7121859 100644 --- a/sys/dev/drm2/radeon/evergreen_blit_shaders.c +++ b/sys/dev/drm2/radeon/evergreen_blit_shaders.c @@ -353,6 +353,6 @@ const u32 evergreen_ps[] = 0x00000000, }; -const u32 evergreen_ps_size = DRM_ARRAY_SIZE(evergreen_ps); -const u32 evergreen_vs_size = DRM_ARRAY_SIZE(evergreen_vs); -const u32 evergreen_default_size = DRM_ARRAY_SIZE(evergreen_default_state); +const u32 evergreen_ps_size = ARRAY_SIZE(evergreen_ps); +const u32 evergreen_vs_size = ARRAY_SIZE(evergreen_vs); +const u32 evergreen_default_size = ARRAY_SIZE(evergreen_default_state); diff --git a/sys/dev/drm2/radeon/evergreen_cs.c b/sys/dev/drm2/radeon/evergreen_cs.c index 1dac265..018ffcc 100644 --- a/sys/dev/drm2/radeon/evergreen_cs.c +++ b/sys/dev/drm2/radeon/evergreen_cs.c @@ -40,6 +40,10 @@ __FBSDID("$FreeBSD$"); #define MAX(a,b) (((a)>(b))?(a):(b)) #define MIN(a,b) (((a)<(b))?(a):(b)) +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +int r600_dma_cs_next_reloc(struct radeon_cs_parser *p, + struct radeon_cs_reloc **cs_reloc); +#endif static int evergreen_cs_packet_next_reloc(struct radeon_cs_parser *p, struct radeon_cs_reloc **cs_reloc); @@ -1292,9 +1296,9 @@ static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) int r; if (p->rdev->family >= CHIP_CAYMAN) - last_reg = DRM_ARRAY_SIZE(cayman_reg_safe_bm); + last_reg = ARRAY_SIZE(cayman_reg_safe_bm); else - last_reg = DRM_ARRAY_SIZE(evergreen_reg_safe_bm); + last_reg = ARRAY_SIZE(evergreen_reg_safe_bm); i = (reg >> 7); if (i >= last_reg) { @@ -1960,9 +1964,9 @@ static bool evergreen_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) u32 last_reg, m, i; if (p->rdev->family >= CHIP_CAYMAN) - last_reg = DRM_ARRAY_SIZE(cayman_reg_safe_bm); + last_reg = ARRAY_SIZE(cayman_reg_safe_bm); else - last_reg = DRM_ARRAY_SIZE(evergreen_reg_safe_bm); + last_reg = ARRAY_SIZE(evergreen_reg_safe_bm); i = (reg >> 7); if (i >= last_reg) { @@ -2759,7 +2763,7 @@ int evergreen_cs_parse(struct radeon_cs_parser *p) if (p->track == NULL) { /* initialize tracker, we are in kms */ - track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (track == NULL) return -ENOMEM; evergreen_cs_track_init(track); diff --git a/sys/dev/drm2/radeon/evergreen_reg.h b/sys/dev/drm2/radeon/evergreen_reg.h index 7603168..7d3e9d7 100644 --- a/sys/dev/drm2/radeon/evergreen_reg.h +++ b/sys/dev/drm2/radeon/evergreen_reg.h @@ -229,6 +229,8 @@ __FBSDID("$FreeBSD$"); #define EVERGREEN_CRTC_STATUS_POSITION 0x6e90 #define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8 #define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4 +#define EVERGREEN_MASTER_UPDATE_LOCK 0x6ef4 +#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8 #define EVERGREEN_DC_GPIO_HPD_MASK 0x64b0 #define EVERGREEN_DC_GPIO_HPD_A 0x64b4 diff --git a/sys/dev/drm2/radeon/ni.c b/sys/dev/drm2/radeon/ni.c index 1484b3e..57ae00c 100644 --- a/sys/dev/drm2/radeon/ni.c +++ b/sys/dev/drm2/radeon/ni.c @@ -34,7 +34,20 @@ __FBSDID("$FreeBSD$"); #include "ni_reg.h" #include "cayman_blit_shaders.h" +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); +extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); +extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev); +extern void evergreen_mc_program(struct radeon_device *rdev); +extern void evergreen_irq_suspend(struct radeon_device *rdev); +extern int evergreen_mc_init(struct radeon_device *rdev); +extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); +#endif extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +extern void si_rlc_fini(struct radeon_device *rdev); +extern int si_rlc_init(struct radeon_device *rdev); +#endif #define EVERGREEN_PFP_UCODE_SIZE 1120 #define EVERGREEN_PM4_UCODE_SIZE 1376 @@ -48,6 +61,27 @@ extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); #define ARUBA_RLC_UCODE_SIZE 1536 +#ifdef __linux__ +/* Firmware Names */ +MODULE_FIRMWARE("radeon/BARTS_pfp.bin"); +MODULE_FIRMWARE("radeon/BARTS_me.bin"); +MODULE_FIRMWARE("radeon/BARTS_mc.bin"); +MODULE_FIRMWARE("radeon/BTC_rlc.bin"); +MODULE_FIRMWARE("radeon/TURKS_pfp.bin"); +MODULE_FIRMWARE("radeon/TURKS_me.bin"); +MODULE_FIRMWARE("radeon/TURKS_mc.bin"); +MODULE_FIRMWARE("radeon/CAICOS_pfp.bin"); +MODULE_FIRMWARE("radeon/CAICOS_me.bin"); +MODULE_FIRMWARE("radeon/CAICOS_mc.bin"); +MODULE_FIRMWARE("radeon/CAYMAN_pfp.bin"); +MODULE_FIRMWARE("radeon/CAYMAN_me.bin"); +MODULE_FIRMWARE("radeon/CAYMAN_mc.bin"); +MODULE_FIRMWARE("radeon/CAYMAN_rlc.bin"); +MODULE_FIRMWARE("radeon/ARUBA_pfp.bin"); +MODULE_FIRMWARE("radeon/ARUBA_me.bin"); +MODULE_FIRMWARE("radeon/ARUBA_rlc.bin"); +#endif + #define BTC_IO_MC_REGS_SIZE 29 static const u32 barts_io_mc_regs[BTC_IO_MC_REGS_SIZE][2] = { @@ -244,7 +278,7 @@ int ni_mc_load_microcode(struct radeon_device *rdev) for (i = 0; i < rdev->usec_timeout; i++) { if (RREG32(MC_IO_PAD_CNTL_D0) & MEM_FALL_OUT_CMD) break; - DRM_UDELAY(1); + udelay(1); } if (running) @@ -478,21 +512,32 @@ static void cayman_gpu_init(struct radeon_device *rdev) (rdev->ddev->pci_device == 0x9907) || (rdev->ddev->pci_device == 0x9908) || (rdev->ddev->pci_device == 0x9909) || + (rdev->ddev->pci_device == 0x990B) || + (rdev->ddev->pci_device == 0x990C) || + (rdev->ddev->pci_device == 0x990F) || (rdev->ddev->pci_device == 0x9910) || - (rdev->ddev->pci_device == 0x9917)) { + (rdev->ddev->pci_device == 0x9917) || + (rdev->ddev->pci_device == 0x9999) || + (rdev->ddev->pci_device == 0x999C)) { rdev->config.cayman.max_simds_per_se = 6; rdev->config.cayman.max_backends_per_se = 2; } else if ((rdev->ddev->pci_device == 0x9903) || (rdev->ddev->pci_device == 0x9904) || (rdev->ddev->pci_device == 0x990A) || + (rdev->ddev->pci_device == 0x990D) || + (rdev->ddev->pci_device == 0x990E) || (rdev->ddev->pci_device == 0x9913) || - (rdev->ddev->pci_device == 0x9918)) { + (rdev->ddev->pci_device == 0x9918) || + (rdev->ddev->pci_device == 0x999D)) { rdev->config.cayman.max_simds_per_se = 4; rdev->config.cayman.max_backends_per_se = 2; } else if ((rdev->ddev->pci_device == 0x9919) || (rdev->ddev->pci_device == 0x9990) || (rdev->ddev->pci_device == 0x9991) || (rdev->ddev->pci_device == 0x9994) || + (rdev->ddev->pci_device == 0x9995) || + (rdev->ddev->pci_device == 0x9996) || + (rdev->ddev->pci_device == 0x999A) || (rdev->ddev->pci_device == 0x99A0)) { rdev->config.cayman.max_simds_per_se = 3; rdev->config.cayman.max_backends_per_se = 1; @@ -622,15 +667,28 @@ static void cayman_gpu_init(struct radeon_device *rdev) WREG32(GB_ADDR_CONFIG, gb_addr_config); WREG32(DMIF_ADDR_CONFIG, gb_addr_config); + if (ASIC_IS_DCE6(rdev)) + WREG32(DMIF_ADDR_CALC, gb_addr_config); WREG32(HDP_ADDR_CONFIG, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); - tmp = gb_addr_config & NUM_PIPES_MASK; - tmp = r6xx_remap_render_backend(rdev, tmp, - rdev->config.cayman.max_backends_per_se * - rdev->config.cayman.max_shader_engines, - CAYMAN_MAX_BACKENDS, disabled_rb_mask); + if ((rdev->config.cayman.max_backends_per_se == 1) && + (rdev->flags & RADEON_IS_IGP)) { + if ((disabled_rb_mask & 3) == 1) { + /* RB0 disabled, RB1 enabled */ + tmp = 0x11111111; + } else { + /* RB1 disabled, RB0 enabled */ + tmp = 0x00000000; + } + } else { + tmp = gb_addr_config & NUM_PIPES_MASK; + tmp = r6xx_remap_render_backend(rdev, tmp, + rdev->config.cayman.max_backends_per_se * + rdev->config.cayman.max_shader_engines, + CAYMAN_MAX_BACKENDS, disabled_rb_mask); + } WREG32(GB_BACKEND_MAP, tmp); cgts_tcc_disable = 0xffff0000; @@ -725,7 +783,7 @@ static void cayman_gpu_init(struct radeon_device *rdev) WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); - DRM_UDELAY(50); + udelay(50); } /* @@ -1072,7 +1130,7 @@ static int cayman_cp_resume(struct radeon_device *rdev) SOFT_RESET_SPI | SOFT_RESET_SX)); RREG32(GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(GRBM_SOFT_RESET, 0); RREG32(GRBM_SOFT_RESET); @@ -1122,7 +1180,7 @@ static int cayman_cp_resume(struct radeon_device *rdev) WREG32(ring->rptr_reg, ring->rptr); WREG32(ring->wptr_reg, ring->wptr); - DRM_MDELAY(1); + mdelay(1); WREG32_P(cp_rb_cntl[i], 0, ~RB_RPTR_WR_ENA); } @@ -1236,7 +1294,7 @@ int cayman_dma_resume(struct radeon_device *rdev) /* Reset dma */ WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA | SOFT_RESET_DMA1); RREG32(SRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(SRBM_SOFT_RESET, 0); for (i = 0; i < 2; i++) { @@ -1367,7 +1425,7 @@ static void cayman_gpu_soft_reset_gfx(struct radeon_device *rdev) dev_info(rdev->dev, " GRBM_SOFT_RESET=0x%08X\n", grbm_reset); WREG32(GRBM_SOFT_RESET, grbm_reset); (void)RREG32(GRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(GRBM_SOFT_RESET, 0); (void)RREG32(GRBM_SOFT_RESET); @@ -1413,7 +1471,7 @@ static void cayman_gpu_soft_reset_dma(struct radeon_device *rdev) /* Reset dma */ WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA | SOFT_RESET_DMA1); RREG32(SRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(SRBM_SOFT_RESET, 0); dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n", @@ -1457,7 +1515,7 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) cayman_gpu_soft_reset_dma(rdev); /* Wait a little for things to settle down */ - DRM_UDELAY(50); + udelay(50); evergreen_mc_resume(rdev, &save); return 0; @@ -1674,6 +1732,7 @@ int cayman_resume(struct radeon_device *rdev) int cayman_suspend(struct radeon_device *rdev) { r600_audio_fini(rdev); + radeon_vm_manager_fini(rdev); cayman_cp_enable(rdev, false); cayman_dma_stop(rdev); evergreen_irq_suspend(rdev); diff --git a/sys/dev/drm2/radeon/nid.h b/sys/dev/drm2/radeon/nid.h index 89c0237..e68e386 100644 --- a/sys/dev/drm2/radeon/nid.h +++ b/sys/dev/drm2/radeon/nid.h @@ -48,6 +48,10 @@ __FBSDID("$FreeBSD$"); #define ARUBA_GB_ADDR_CONFIG_GOLDEN 0x12010001 #define DMIF_ADDR_CONFIG 0xBD4 + +/* DCE6 only */ +#define DMIF_ADDR_CALC 0xC00 + #define SRBM_GFX_CNTL 0x0E44 #define RINGID(x) (((x) & 0x3) << 0) #define VMID(x) (((x) & 0x7) << 0) diff --git a/sys/dev/drm2/radeon/r100.c b/sys/dev/drm2/radeon/r100.c index a66c7c2..84f47d3 100644 --- a/sys/dev/drm2/radeon/r100.c +++ b/sys/dev/drm2/radeon/r100.c @@ -52,6 +52,16 @@ __FBSDID("$FreeBSD$"); #define FIRMWARE_RS600 "radeonkmsfw_RS600_cp" #define FIRMWARE_R520 "radeonkmsfw_R520_cp" +#ifdef __linux__ +MODULE_FIRMWARE(FIRMWARE_R100); +MODULE_FIRMWARE(FIRMWARE_R200); +MODULE_FIRMWARE(FIRMWARE_R300); +MODULE_FIRMWARE(FIRMWARE_R420); +MODULE_FIRMWARE(FIRMWARE_RS690); +MODULE_FIRMWARE(FIRMWARE_RS600); +MODULE_FIRMWARE(FIRMWARE_R520); +#endif + #include "r100_track.h" /* This files gather functions specifics to: @@ -59,6 +69,38 @@ __FBSDID("$FreeBSD$"); * and others in some cases. */ +static bool r100_is_in_vblank(struct radeon_device *rdev, int crtc) +{ + if (crtc == 0) { + if (RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR) + return true; + else + return false; + } else { + if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR) + return true; + else + return false; + } +} + +static bool r100_is_counter_moving(struct radeon_device *rdev, int crtc) +{ + u32 vline1, vline2; + + if (crtc == 0) { + vline1 = (RREG32(RADEON_CRTC_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL; + vline2 = (RREG32(RADEON_CRTC_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL; + } else { + vline1 = (RREG32(RADEON_CRTC2_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL; + vline2 = (RREG32(RADEON_CRTC2_VLINE_CRNT_VLINE) >> 16) & RADEON_CRTC_V_TOTAL; + } + if (vline1 != vline2) + return true; + else + return false; +} + /** * r100_wait_for_vblank - vblank wait asic callback. * @@ -69,36 +111,33 @@ __FBSDID("$FreeBSD$"); */ void r100_wait_for_vblank(struct radeon_device *rdev, int crtc) { - int i; + unsigned i = 0; if (crtc >= rdev->num_crtc) return; if (crtc == 0) { - if (RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN) { - for (i = 0; i < rdev->usec_timeout; i++) { - if (!(RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR)) - break; - DRM_UDELAY(1); - } - for (i = 0; i < rdev->usec_timeout; i++) { - if (RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR) - break; - DRM_UDELAY(1); - } - } + if (!(RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN)) + return; } else { - if (RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_EN) { - for (i = 0; i < rdev->usec_timeout; i++) { - if (!(RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)) - break; - DRM_UDELAY(1); - } - for (i = 0; i < rdev->usec_timeout; i++) { - if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR) - break; - DRM_UDELAY(1); - } + if (!(RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_EN)) + return; + } + + /* depending on when we hit vblank, we may be close to active; if so, + * wait for another frame. + */ + while (r100_is_in_vblank(rdev, crtc)) { + if (i++ % 100 == 0) { + if (!r100_is_counter_moving(rdev, crtc)) + break; + } + } + + while (!r100_is_in_vblank(rdev, crtc)) { + if (i++ % 100 == 0) { + if (!r100_is_counter_moving(rdev, crtc)) + break; } } } @@ -160,7 +199,7 @@ u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) for (i = 0; i < rdev->usec_timeout; i++) { if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET) break; - DRM_UDELAY(1); + udelay(1); } DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n"); @@ -335,7 +374,7 @@ void r100_pm_misc(struct radeon_device *rdev) tmp &= ~(voltage->gpio.mask); WREG32(voltage->gpio.reg, tmp); if (voltage->delay) - DRM_UDELAY(voltage->delay); + udelay(voltage->delay); } else { tmp = RREG32(voltage->gpio.reg); if (voltage->active_high) @@ -344,7 +383,7 @@ void r100_pm_misc(struct radeon_device *rdev) tmp |= voltage->gpio.mask; WREG32(voltage->gpio.reg, tmp); if (voltage->delay) - DRM_UDELAY(voltage->delay); + udelay(voltage->delay); } } @@ -713,7 +752,7 @@ void r100_irq_disable(struct radeon_device *rdev) WREG32(R_000040_GEN_INT_CNTL, 0); /* Wait and acknowledge irq */ - DRM_MDELAY(1); + mdelay(1); tmp = RREG32(R_000044_GEN_INT_STATUS); WREG32(R_000044_GEN_INT_STATUS, tmp); } @@ -924,7 +963,7 @@ static int r100_cp_wait_for_idle(struct radeon_device *rdev) if (!G_000E40_CP_CMDSTRM_BUSY(tmp)) { return 0; } - DRM_UDELAY(1); + udelay(1); } return -1; } @@ -1143,7 +1182,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) } WREG32(RADEON_CP_RB_CNTL, tmp); - DRM_UDELAY(10); + udelay(10); ring->rptr = RREG32(RADEON_CP_RB_RPTR); /* Set cp mode to bus mastering & enable cp*/ WREG32(RADEON_CP_CSQ_MODE, @@ -2616,14 +2655,14 @@ void r100_bm_disable(struct radeon_device *rdev) /* disable bus mastering */ tmp = RREG32(R_000030_BUS_CNTL); WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000044); - DRM_MDELAY(1); + mdelay(1); WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000042); - DRM_MDELAY(1); + mdelay(1); WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040); tmp = RREG32(RADEON_BUS_CNTL); - DRM_MDELAY(1); + mdelay(1); pci_disable_busmaster(rdev->dev); - DRM_MDELAY(1); + mdelay(1); } int r100_asic_reset(struct radeon_device *rdev) @@ -2655,17 +2694,17 @@ int r100_asic_reset(struct radeon_device *rdev) S_0000F0_SOFT_RESET_PP(1) | S_0000F0_SOFT_RESET_RB(1)); RREG32(R_0000F0_RBBM_SOFT_RESET); - DRM_MDELAY(500); + mdelay(500); WREG32(R_0000F0_RBBM_SOFT_RESET, 0); - DRM_MDELAY(1); + mdelay(1); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* reset CP */ WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_CP(1)); RREG32(R_0000F0_RBBM_SOFT_RESET); - DRM_MDELAY(500); + mdelay(500); WREG32(R_0000F0_RBBM_SOFT_RESET, 0); - DRM_MDELAY(1); + mdelay(1); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* restore PCI & busmastering */ @@ -2931,7 +2970,7 @@ static void r100_pll_errata_after_data(struct radeon_device *rdev) * or the chip could hang on a subsequent access */ if (rdev->pll_errata & CHIP_ERRATA_PLL_DELAY) { - DRM_MDELAY(5); + mdelay(5); } /* This function is required to workaround a hardware bug in some (all?) @@ -2973,10 +3012,10 @@ static void r100_set_safe_registers(struct radeon_device *rdev) { if (ASIC_IS_RN50(rdev)) { rdev->config.r100.reg_safe_bm = rn50_reg_safe_bm; - rdev->config.r100.reg_safe_bm_size = DRM_ARRAY_SIZE(rn50_reg_safe_bm); + rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(rn50_reg_safe_bm); } else if (rdev->family < CHIP_R200) { rdev->config.r100.reg_safe_bm = r100_reg_safe_bm; - rdev->config.r100.reg_safe_bm_size = DRM_ARRAY_SIZE(r100_reg_safe_bm); + rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(r100_reg_safe_bm); } else { r200_set_safe_registers(rdev); } diff --git a/sys/dev/drm2/radeon/r200.c b/sys/dev/drm2/radeon/r200.c index 566645f..25a197e 100644 --- a/sys/dev/drm2/radeon/r200.c +++ b/sys/dev/drm2/radeon/r200.c @@ -548,5 +548,5 @@ int r200_packet0_check(struct radeon_cs_parser *p, void r200_set_safe_registers(struct radeon_device *rdev) { rdev->config.r100.reg_safe_bm = r200_reg_safe_bm; - rdev->config.r100.reg_safe_bm_size = DRM_ARRAY_SIZE(r200_reg_safe_bm); + rdev->config.r100.reg_safe_bm_size = ARRAY_SIZE(r200_reg_safe_bm); } diff --git a/sys/dev/drm2/radeon/r300.c b/sys/dev/drm2/radeon/r300.c index 5681035..caaff4a 100644 --- a/sys/dev/drm2/radeon/r300.c +++ b/sys/dev/drm2/radeon/r300.c @@ -407,9 +407,9 @@ int r300_asic_reset(struct radeon_device *rdev) WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) | S_0000F0_SOFT_RESET_GA(1)); RREG32(R_0000F0_RBBM_SOFT_RESET); - DRM_MDELAY(500); + mdelay(500); WREG32(R_0000F0_RBBM_SOFT_RESET, 0); - DRM_MDELAY(1); + mdelay(1); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* resetting the CP seems to be problematic sometimes it end up @@ -419,9 +419,9 @@ int r300_asic_reset(struct radeon_device *rdev) */ WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_CP(1)); RREG32(R_0000F0_RBBM_SOFT_RESET); - DRM_MDELAY(500); + mdelay(500); WREG32(R_0000F0_RBBM_SOFT_RESET, 0); - DRM_MDELAY(1); + mdelay(1); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* restore PCI & busmastering */ @@ -1254,7 +1254,7 @@ int r300_cs_parse(struct radeon_cs_parser *p) struct r100_cs_track *track; int r; - track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (track == NULL) return -ENOMEM; r100_cs_track_clear(p->rdev, track); @@ -1299,7 +1299,7 @@ int r300_cs_parse(struct radeon_cs_parser *p) void r300_set_reg_safe(struct radeon_device *rdev) { rdev->config.r300.reg_safe_bm = r300_reg_safe_bm; - rdev->config.r300.reg_safe_bm_size = DRM_ARRAY_SIZE(r300_reg_safe_bm); + rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r300_reg_safe_bm); } void r300_mc_program(struct radeon_device *rdev) diff --git a/sys/dev/drm2/radeon/r300_cmdbuf.c b/sys/dev/drm2/radeon/r300_cmdbuf.c index 4f41b13..421747c 100644 --- a/sys/dev/drm2/radeon/r300_cmdbuf.c +++ b/sys/dev/drm2/radeon/r300_cmdbuf.c @@ -1013,7 +1013,7 @@ int r300_do_cp_cmdbuf(struct drm_device *dev, drm_radeon_kcmd_buffer_t *cmdbuf) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; struct drm_device_dma *dma = dev->dma; struct drm_buf *buf = NULL; int emit_dispatch_age = 0; @@ -1120,7 +1120,7 @@ int r300_do_cp_cmdbuf(struct drm_device *dev, } emit_dispatch_age = 1; - r300_discard_buffer(dev, file_priv->masterp, buf); + r300_discard_buffer(dev, file_priv->master, buf); break; case R300_CMD_WAIT: diff --git a/sys/dev/drm2/radeon/r420.c b/sys/dev/drm2/radeon/r420.c index e422f9d..eb38d46 100644 --- a/sys/dev/drm2/radeon/r420.c +++ b/sys/dev/drm2/radeon/r420.c @@ -80,7 +80,7 @@ void r420_pm_init_profile(struct radeon_device *rdev) static void r420_set_reg_safe(struct radeon_device *rdev) { rdev->config.r300.reg_safe_bm = r420_reg_safe_bm; - rdev->config.r300.reg_safe_bm_size = DRM_ARRAY_SIZE(r420_reg_safe_bm); + rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm); } void r420_pipes_init(struct radeon_device *rdev) diff --git a/sys/dev/drm2/radeon/r500_reg.h b/sys/dev/drm2/radeon/r500_reg.h index 7b7130e..78e7bd0 100644 --- a/sys/dev/drm2/radeon/r500_reg.h +++ b/sys/dev/drm2/radeon/r500_reg.h @@ -129,10 +129,6 @@ __FBSDID("$FreeBSD$"); # define RS690_MC_INDEX_MASK 0x1ff # define RS690_MC_INDEX_WR_EN (1 << 9) # define RS690_MC_INDEX_WR_ACK 0x7f -#define RS690_MC_NB_CNTL 0x0 -# define RS690_HIDE_MMCFG_BAR (1 << 3) -# define RS690_AGPMODE30 (1 << 4) -# define RS690_AGP30ENHANCED (1 << 5) #define RS690_MC_DATA 0x7c #define RS690_MC_STATUS 0x90 #define RS690_MC_STATUS_IDLE (1 << 0) @@ -364,7 +360,9 @@ __FBSDID("$FreeBSD$"); #define AVIVO_D1CRTC_FRAME_COUNT 0x60a4 #define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4 +#define AVIVO_D1MODE_MASTER_UPDATE_LOCK 0x60e0 #define AVIVO_D1MODE_MASTER_UPDATE_MODE 0x60e4 +#define AVIVO_D1CRTC_UPDATE_LOCK 0x60e8 /* master controls */ #define AVIVO_DC_CRTC_MASTER_EN 0x60f8 diff --git a/sys/dev/drm2/radeon/r600.c b/sys/dev/drm2/radeon/r600.c index 586427d..68f417c 100644 --- a/sys/dev/drm2/radeon/r600.c +++ b/sys/dev/drm2/radeon/r600.c @@ -50,7 +50,7 @@ __FBSDID("$FreeBSD$"); #define CAYMAN_RLC_UCODE_SIZE 1024 #define ARUBA_RLC_UCODE_SIZE 1536 -#ifdef DUMBBELL_WIP +#ifdef __linux__ /* Firmware Names */ MODULE_FIRMWARE("radeon/R600_pfp.bin"); MODULE_FIRMWARE("radeon/R600_me.bin"); @@ -93,12 +93,18 @@ MODULE_FIRMWARE("radeon/SUMO_pfp.bin"); MODULE_FIRMWARE("radeon/SUMO_me.bin"); MODULE_FIRMWARE("radeon/SUMO2_pfp.bin"); MODULE_FIRMWARE("radeon/SUMO2_me.bin"); -#endif /* DUMBBELL_WIP */ +#endif int r600_debugfs_mc_info_init(struct radeon_device *rdev); /* r600,rv610,rv630,rv620,rv635,rv670 */ +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +int r600_mc_wait_for_idle(struct radeon_device *rdev); +#endif static void r600_gpu_init(struct radeon_device *rdev); +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +void r600_fini(struct radeon_device *rdev); +#endif void r600_irq_disable(struct radeon_device *rdev); static void r600_pcie_gen2_enable(struct radeon_device *rdev); @@ -860,7 +866,7 @@ void r600_pcie_gart_tlb_flush(struct radeon_device *rdev) if (tmp) { return; } - DRM_UDELAY(1); + udelay(1); } } @@ -1021,7 +1027,7 @@ int r600_mc_wait_for_idle(struct radeon_device *rdev) tmp = RREG32(R_000E50_SRBM_STATUS) & 0x3F00; if (!tmp) return 0; - DRM_UDELAY(1); + udelay(1); } return -1; } @@ -1209,7 +1215,7 @@ static int r600_mc_init(struct radeon_device *rdev) int r600_vram_scratch_init(struct radeon_device *rdev) { int r; - void *vram_scratch_ptr_ptr; + void *vram_scratch_ptr_ptr; /* FreeBSD: to please GCC 4.2. */ if (rdev->vram_scratch.robj == NULL) { r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, @@ -1324,7 +1330,7 @@ static void r600_gpu_soft_reset_gfx(struct radeon_device *rdev) dev_info(rdev->dev, " R_008020_GRBM_SOFT_RESET=0x%08X\n", tmp); WREG32(R_008020_GRBM_SOFT_RESET, tmp); RREG32(R_008020_GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(R_008020_GRBM_SOFT_RESET, 0); } /* Reset CP (we always reset CP) */ @@ -1332,7 +1338,7 @@ static void r600_gpu_soft_reset_gfx(struct radeon_device *rdev) dev_info(rdev->dev, "R_008020_GRBM_SOFT_RESET=0x%08X\n", tmp); WREG32(R_008020_GRBM_SOFT_RESET, tmp); RREG32(R_008020_GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(R_008020_GRBM_SOFT_RESET, 0); dev_info(rdev->dev, " R_008010_GRBM_STATUS = 0x%08X\n", @@ -1373,7 +1379,7 @@ static void r600_gpu_soft_reset_dma(struct radeon_device *rdev) else WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA); RREG32(SRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(SRBM_SOFT_RESET, 0); dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n", @@ -1407,7 +1413,7 @@ static int r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) r600_gpu_soft_reset_dma(rdev); /* Wait a little for things to settle down */ - DRM_MDELAY(1); + mdelay(1); rv515_mc_resume(rdev, &save); return 0; @@ -2168,7 +2174,7 @@ static int r600_cp_load_microcode(struct radeon_device *rdev) /* Reset cp */ WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); RREG32(GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(GRBM_SOFT_RESET, 0); WREG32(CP_ME_RAM_WADDR, 0); @@ -2231,7 +2237,7 @@ int r600_cp_resume(struct radeon_device *rdev) /* Reset cp */ WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); RREG32(GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(GRBM_SOFT_RESET, 0); /* Set ring buffer size */ @@ -2265,7 +2271,7 @@ int r600_cp_resume(struct radeon_device *rdev) WREG32(SCRATCH_UMSK, 0); } - DRM_MDELAY(1); + mdelay(1); WREG32(CP_RB_CNTL, tmp); WREG32(CP_RB_BASE, ring->gpu_addr >> 8); @@ -2362,7 +2368,7 @@ int r600_dma_resume(struct radeon_device *rdev) else WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA); RREG32(SRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(SRBM_SOFT_RESET, 0); WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0); @@ -3255,7 +3261,7 @@ void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size) int r600_ih_ring_alloc(struct radeon_device *rdev) { int r; - void *ring_ptr; + void *ring_ptr; /* FreeBSD: to please GCC 4.2. */ /* Allocate ring buffer */ if (rdev->ih.ring_obj == NULL) { @@ -3320,7 +3326,7 @@ void r600_rlc_stop(struct radeon_device *rdev) /* r7xx asics need to soft reset RLC before halting */ WREG32(SRBM_SOFT_RESET, SOFT_RESET_RLC); RREG32(SRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(SRBM_SOFT_RESET, 0); RREG32(SRBM_SOFT_RESET); } @@ -3813,7 +3819,7 @@ void r600_irq_disable(struct radeon_device *rdev) { r600_disable_interrupts(rdev); /* Wait and acknowledge irq */ - DRM_MDELAY(1); + mdelay(1); r600_irq_ack(rdev); r600_disable_interrupt_state(rdev); } diff --git a/sys/dev/drm2/radeon/r600_blit.c b/sys/dev/drm2/radeon/r600_blit.c index f44fd79..514a92d 100644 --- a/sys/dev/drm2/radeon/r600_blit.c +++ b/sys/dev/drm2/radeon/r600_blit.c @@ -539,7 +539,7 @@ static void r600_nomm_put_vb(struct drm_device *dev) drm_radeon_private_t *dev_priv = dev->dev_private; dev_priv->blit_vb->used = 0; - radeon_cp_discard_buffer(dev, dev_priv->blit_vb->file_priv->masterp, dev_priv->blit_vb); + radeon_cp_discard_buffer(dev, dev_priv->blit_vb->file_priv->master, dev_priv->blit_vb); } static void *r600_nomm_get_vb_ptr(struct drm_device *dev) diff --git a/sys/dev/drm2/radeon/r600_blit_shaders.c b/sys/dev/drm2/radeon/r600_blit_shaders.c index 1095a2c..6f284de 100644 --- a/sys/dev/drm2/radeon/r600_blit_shaders.c +++ b/sys/dev/drm2/radeon/r600_blit_shaders.c @@ -714,7 +714,7 @@ const u32 r6xx_ps[] = 0x00000000, }; -const u32 r6xx_ps_size = DRM_ARRAY_SIZE(r6xx_ps); -const u32 r6xx_vs_size = DRM_ARRAY_SIZE(r6xx_vs); -const u32 r6xx_default_size = DRM_ARRAY_SIZE(r6xx_default_state); -const u32 r7xx_default_size = DRM_ARRAY_SIZE(r7xx_default_state); +const u32 r6xx_ps_size = ARRAY_SIZE(r6xx_ps); +const u32 r6xx_vs_size = ARRAY_SIZE(r6xx_vs); +const u32 r6xx_default_size = ARRAY_SIZE(r6xx_default_state); +const u32 r7xx_default_size = ARRAY_SIZE(r7xx_default_state); diff --git a/sys/dev/drm2/radeon/r600_cp.c b/sys/dev/drm2/radeon/r600_cp.c index 2907bdb..f4a78df 100644 --- a/sys/dev/drm2/radeon/r600_cp.c +++ b/sys/dev/drm2/radeon/r600_cp.c @@ -44,6 +44,37 @@ __FBSDID("$FreeBSD$"); #define R700_PFP_UCODE_SIZE 848 #define R700_PM4_UCODE_SIZE 1360 +#ifdef __linux__ +/* Firmware Names */ +MODULE_FIRMWARE("radeon/R600_pfp.bin"); +MODULE_FIRMWARE("radeon/R600_me.bin"); +MODULE_FIRMWARE("radeon/RV610_pfp.bin"); +MODULE_FIRMWARE("radeon/RV610_me.bin"); +MODULE_FIRMWARE("radeon/RV630_pfp.bin"); +MODULE_FIRMWARE("radeon/RV630_me.bin"); +MODULE_FIRMWARE("radeon/RV620_pfp.bin"); +MODULE_FIRMWARE("radeon/RV620_me.bin"); +MODULE_FIRMWARE("radeon/RV635_pfp.bin"); +MODULE_FIRMWARE("radeon/RV635_me.bin"); +MODULE_FIRMWARE("radeon/RV670_pfp.bin"); +MODULE_FIRMWARE("radeon/RV670_me.bin"); +MODULE_FIRMWARE("radeon/RS780_pfp.bin"); +MODULE_FIRMWARE("radeon/RS780_me.bin"); +MODULE_FIRMWARE("radeon/RV770_pfp.bin"); +MODULE_FIRMWARE("radeon/RV770_me.bin"); +MODULE_FIRMWARE("radeon/RV730_pfp.bin"); +MODULE_FIRMWARE("radeon/RV730_me.bin"); +MODULE_FIRMWARE("radeon/RV710_pfp.bin"); +MODULE_FIRMWARE("radeon/RV710_me.bin"); +#endif + + +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp, + unsigned family, u32 *ib, int *l); +void r600_cs_legacy_init(void); +#endif + # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ # define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1)) @@ -392,7 +423,7 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv) RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); RADEON_READ(R600_GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); fw_data = (const __be32 *)dev_priv->me_fw->data; @@ -485,7 +516,7 @@ static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv) RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); RADEON_READ(R600_GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); fw_data = (const __be32 *)dev_priv->pfp_fw->data; @@ -1777,7 +1808,7 @@ static void r600_cp_init_ring_buffer(struct drm_device *dev, RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); RADEON_READ(R600_GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); @@ -1907,7 +1938,7 @@ static void r600_cp_init_ring_buffer(struct drm_device *dev, RADEON_WRITE(R600_LAST_CLEAR_REG, 0); /* reset sarea copies of these */ - master_priv = file_priv->masterp->driver_priv; + master_priv = file_priv->master->driver_priv; if (master_priv->sarea_priv) { master_priv->sarea_priv->last_frame = 0; master_priv->sarea_priv->last_dispatch = 0; @@ -1966,7 +1997,7 @@ int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; DRM_DEBUG("\n"); @@ -2401,7 +2432,7 @@ int r600_cp_dispatch_indirect(struct drm_device *dev, void r600_cp_dispatch_swap(struct drm_device *dev, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_master *master = file_priv->masterp; + struct drm_master *master = file_priv->master; struct drm_radeon_master_private *master_priv = master->driver_priv; drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv; int nbox = sarea_priv->nbox; @@ -2523,7 +2554,7 @@ int r600_cp_dispatch_texture(struct drm_device *dev, r600_blit_copy(dev, src_offset, dst_offset, pass_size); - radeon_cp_discard_buffer(dev, file_priv->masterp, buf); + radeon_cp_discard_buffer(dev, file_priv->master, buf); /* Update the input parameters for next time */ image->data = (const u8 __user *)image->data + pass_size; @@ -2588,7 +2619,7 @@ static void r600_ib_free(struct drm_device *dev, struct drm_buf *buf, if (buf) { if (!r) r600_cp_dispatch_indirect(dev, buf, 0, l * 4); - radeon_cp_discard_buffer(dev, fpriv->masterp, buf); + radeon_cp_discard_buffer(dev, fpriv->master, buf); COMMIT_RING(); } } diff --git a/sys/dev/drm2/radeon/r600_cs.c b/sys/dev/drm2/radeon/r600_cs.c index 9000b3c..4b1a705 100644 --- a/sys/dev/drm2/radeon/r600_cs.c +++ b/sys/dev/drm2/radeon/r600_cs.c @@ -43,6 +43,9 @@ static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p, struct radeon_cs_reloc **cs_reloc); typedef int (*next_reloc_t)(struct radeon_cs_parser*, struct radeon_cs_reloc**); static next_reloc_t r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_mm; +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +extern void r600_cs_legacy_get_tiling_conf(struct drm_device *dev, u32 *npipes, u32 *nbanks, u32 *group_size); +#endif struct r600_cs_track { @@ -186,7 +189,7 @@ static const struct gpu_formats color_formats_table[] = { bool r600_fmt_is_valid_color(u32 format) { - if (format >= DRM_ARRAY_SIZE(color_formats_table)) + if (format >= ARRAY_SIZE(color_formats_table)) return false; if (color_formats_table[format].valid_color) @@ -197,7 +200,7 @@ bool r600_fmt_is_valid_color(u32 format) bool r600_fmt_is_valid_texture(u32 format, enum radeon_family family) { - if (format >= DRM_ARRAY_SIZE(color_formats_table)) + if (format >= ARRAY_SIZE(color_formats_table)) return false; if (family < color_formats_table[format].min_family) @@ -211,7 +214,7 @@ bool r600_fmt_is_valid_texture(u32 format, enum radeon_family family) int r600_fmt_get_blocksize(u32 format) { - if (format >= DRM_ARRAY_SIZE(color_formats_table)) + if (format >= ARRAY_SIZE(color_formats_table)) return 0; return color_formats_table[format].blocksize; @@ -221,7 +224,7 @@ int r600_fmt_get_nblocksx(u32 format, u32 w) { unsigned bw; - if (format >= DRM_ARRAY_SIZE(color_formats_table)) + if (format >= ARRAY_SIZE(color_formats_table)) return 0; bw = color_formats_table[format].blockwidth; @@ -235,7 +238,7 @@ int r600_fmt_get_nblocksy(u32 format, u32 h) { unsigned bh; - if (format >= DRM_ARRAY_SIZE(color_formats_table)) + if (format >= ARRAY_SIZE(color_formats_table)) return 0; bh = color_formats_table[format].blockheight; @@ -1117,7 +1120,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) int r; i = (reg >> 7); - if (i >= DRM_ARRAY_SIZE(r600_reg_safe_bm)) { + if (i >= ARRAY_SIZE(r600_reg_safe_bm)) { dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return -EINVAL; } @@ -1741,7 +1744,7 @@ static bool r600_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) u32 m, i; i = (reg >> 7); - if (i >= DRM_ARRAY_SIZE(r600_reg_safe_bm)) { + if (i >= ARRAY_SIZE(r600_reg_safe_bm)) { dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return false; } @@ -2400,7 +2403,7 @@ int r600_cs_parse(struct radeon_cs_parser *p) if (p->track == NULL) { /* initialize tracker, we are in kms */ track = malloc(sizeof(*track), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (track == NULL) return -ENOMEM; r600_cs_track_init(track); @@ -2447,7 +2450,7 @@ int r600_cs_parse(struct radeon_cs_parser *p) #if 0 for (r = 0; r < p->ib.length_dw; r++) { DRM_INFO("%05d 0x%08X\n", r, p->ib.ptr[r]); - DRM_MDELAY(1); + mdelay(1); } #endif free(p->track, DRM_MEM_DRIVER); @@ -2461,7 +2464,7 @@ static int r600_cs_parser_relocs_legacy(struct radeon_cs_parser *p) return 0; } p->relocs = malloc(sizeof(struct radeon_cs_reloc), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (p->relocs == NULL) { return -ENOMEM; } @@ -2502,7 +2505,7 @@ int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp, int r; /* initialize tracker */ - track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + track = malloc(sizeof(*track), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (track == NULL) return -ENOMEM; r600_cs_track_init(track); @@ -2510,7 +2513,7 @@ int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp, /* initialize parser */ memset(&parser, 0, sizeof(struct radeon_cs_parser)); parser.filp = filp; - parser.dev = dev->device; + parser.dev = dev->dev; parser.rdev = NULL; parser.family = family; parser.track = track; @@ -2754,7 +2757,7 @@ int r600_dma_cs_parse(struct radeon_cs_parser *p) #if 0 for (r = 0; r < p->ib->length_dw; r++) { DRM_INFO("%05d 0x%08X\n", r, p->ib.ptr[r]); - DRM_MDELAY(1); + mdelay(1); } #endif return 0; diff --git a/sys/dev/drm2/radeon/r600_hdmi.c b/sys/dev/drm2/radeon/r600_hdmi.c index 46a72fb..d75b3d3 100644 --- a/sys/dev/drm2/radeon/r600_hdmi.c +++ b/sys/dev/drm2/radeon/r600_hdmi.c @@ -493,7 +493,7 @@ void r600_hdmi_enable(struct drm_encoder *encoder) offset = dig->afmt->offset; /* Older chipsets require setting HDMI and routing manually */ - if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { + if (ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE3(rdev)) { hdmi = HDMI0_ERROR_ACK | HDMI0_ENABLE; switch (radeon_encoder->encoder_id) { case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: @@ -548,7 +548,6 @@ void r600_hdmi_disable(struct drm_encoder *encoder) /* Called for ATOM_ENCODER_MODE_HDMI only */ if (!dig || !dig->afmt) { - DRM_ERROR("%s: !dig || !dig->afmt", __func__); return; } if (!dig->afmt->enabled) @@ -562,7 +561,7 @@ void r600_hdmi_disable(struct drm_encoder *encoder) radeon_irq_kms_disable_afmt(rdev, dig->afmt->id); /* Older chipsets not handled by AtomBIOS */ - if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { + if (ASIC_IS_DCE2(rdev) && !ASIC_IS_DCE3(rdev)) { switch (radeon_encoder->encoder_id) { case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: WREG32_P(AVIVO_TMDSA_CNTL, 0, diff --git a/sys/dev/drm2/radeon/r600d.h b/sys/dev/drm2/radeon/r600d.h index 174b1fe..92f35de 100644 --- a/sys/dev/drm2/radeon/r600d.h +++ b/sys/dev/drm2/radeon/r600d.h @@ -48,11 +48,17 @@ __FBSDID("$FreeBSD$"); #define R6XX_MAX_PIPES_MASK 0xff /* PTE flags */ +/* + * FIXME Linux<->FreeBSD: PTE_VALID is already defined on PowerPC on FreeBSD. + * Fortunately, it's never used in the Radeon driver. + */ +/* #define PTE_VALID (1 << 0) #define PTE_SYSTEM (1 << 1) #define PTE_SNOOPED (1 << 2) #define PTE_READABLE (1 << 5) #define PTE_WRITEABLE (1 << 6) +*/ /* tiling bits */ #define ARRAY_LINEAR_GENERAL 0x00000000 diff --git a/sys/dev/drm2/radeon/radeon.h b/sys/dev/drm2/radeon/radeon.h index 8d932d9..4a63cf6 100644 --- a/sys/dev/drm2/radeon/radeon.h +++ b/sys/dev/drm2/radeon/radeon.h @@ -72,8 +72,10 @@ __FBSDID("$FreeBSD$"); #include <sys/linker.h> #include <sys/firmware.h> +#if defined(CONFIG_ACPI) #include <contrib/dev/acpica/include/acpi.h> #include <dev/acpica/acpivar.h> +#endif #include <dev/drm2/ttm/ttm_bo_api.h> #include <dev/drm2/ttm/ttm_bo_driver.h> @@ -111,7 +113,7 @@ extern int radeon_lockup_timeout; * symbol; */ #define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ -#define RADEON_FENCE_JIFFIES_TIMEOUT (DRM_HZ / 2) +#define RADEON_FENCE_JIFFIES_TIMEOUT (HZ / 2) /* RADEON_IB_POOL_SIZE must be a power of 2 */ #define RADEON_IB_POOL_SIZE 16 #define RADEON_DEBUGFS_MAX_COMPONENTS 32 @@ -1103,9 +1105,9 @@ struct radeon_pm { /* selected pm method */ enum radeon_pm_method pm_method; /* dynpm power management */ -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP struct delayed_work dynpm_idle_work; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ enum radeon_dynpm_state dynpm_state; enum radeon_dynpm_action dynpm_planned_action; unsigned long dynpm_action_timeout; @@ -1117,9 +1119,9 @@ struct radeon_pm { struct radeon_pm_profile profiles[PM_PROFILE_MAX]; /* internal thermal controller on rv6xx+ */ enum radeon_int_thermal_type int_thermal_type; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP struct device *int_hwmon_dev; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ }; int radeon_pm_get_type_index(struct radeon_device *rdev, @@ -1637,10 +1639,12 @@ struct radeon_device { struct sx dc_hw_i2c_mutex; /* display controller hw i2c mutex */ bool audio_enabled; struct r600_audio audio_status; /* audio stuff */ +#if defined(CONFIG_ACPI) struct { ACPI_HANDLE handle; ACPI_NOTIFY_HANDLER notifier_call; } acpi; +#endif /* only one userspace can use Hyperz features or CMASK at a time */ struct drm_file *hyperz_filp; struct drm_file *cmask_filp; @@ -1796,7 +1800,7 @@ void radeon_atombios_fini(struct radeon_device *rdev); /* * RING helpers. */ -#if !defined(DRM_DEBUG_CODE) || DRM_DEBUG_CODE == 0 +#if DRM_DEBUG_CODE == 0 static inline void radeon_ring_write(struct radeon_ring *ring, uint32_t v) { ring->ring[ring->wptr++] = v; @@ -1985,8 +1989,13 @@ extern int ni_mc_load_microcode(struct radeon_device *rdev); extern void ni_fini_microcode(struct radeon_device *rdev); /* radeon_acpi.c */ +#if defined(CONFIG_ACPI) extern int radeon_acpi_init(struct radeon_device *rdev); extern void radeon_acpi_fini(struct radeon_device *rdev); +#else +static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; } +static inline void radeon_acpi_fini(struct radeon_device *rdev) { } +#endif /* Prototypes added by @dumbbell. */ diff --git a/sys/dev/drm2/radeon/radeon_acpi.c b/sys/dev/drm2/radeon/radeon_acpi.c index 176e160..a725ab7 100644 --- a/sys/dev/drm2/radeon/radeon_acpi.c +++ b/sys/dev/drm2/radeon/radeon_acpi.c @@ -32,6 +32,8 @@ __FBSDID("$FreeBSD$"); #define ACPI_AC_CLASS "ac_adapter" +extern void radeon_pm_acpi_event_handler(struct radeon_device *rdev); + struct atif_verify_interface { u16 size; /* structure size in bytes (includes size field) */ u16 version; /* version */ @@ -358,7 +360,7 @@ void radeon_atif_handler(struct radeon_device *rdev, radeon_set_backlight_level(rdev, enc, req.backlight_level); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (rdev->is_atom_bios) { struct radeon_encoder_atom_dig *dig = enc->enc_priv; backlight_force_update(dig->bl_dev, @@ -368,7 +370,7 @@ void radeon_atif_handler(struct radeon_device *rdev, backlight_force_update(dig->bl_dev, BACKLIGHT_UPDATE_HOTKEY); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } } /* TODO: check other events */ @@ -508,7 +510,7 @@ static void radeon_acpi_event(ACPI_HANDLE handle, UINT32 type, { struct radeon_device *rdev = (struct radeon_device *)context; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) { if (power_supply_is_system_supplied() > 0) DRM_DEBUG_DRIVER("pm: AC\n"); @@ -517,7 +519,7 @@ static void radeon_acpi_event(ACPI_HANDLE handle, UINT32 type, radeon_pm_acpi_event_handler(rdev); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* Check for pending SBIOS requests */ radeon_atif_handler(rdev, type); diff --git a/sys/dev/drm2/radeon/radeon_agp.c b/sys/dev/drm2/radeon/radeon_agp.c index 0ac376b..aabdf72 100644 --- a/sys/dev/drm2/radeon/radeon_agp.c +++ b/sys/dev/drm2/radeon/radeon_agp.c @@ -153,11 +153,11 @@ int radeon_agp_init(struct radeon_device *rdev) return ret; } - if ((rdev->ddev->agp->info.ai_aperture_size >> 20) < 32) { + if ((rdev->ddev->agp->agp_info.ai_aperture_size >> 20) < 32) { drm_agp_release(rdev->ddev); dev_warn(rdev->dev, "AGP aperture too small (%zuM) " "need at least 32M, disabling AGP\n", - rdev->ddev->agp->info.ai_aperture_size >> 20); + rdev->ddev->agp->agp_info.ai_aperture_size >> 20); return -EINVAL; } @@ -245,8 +245,8 @@ int radeon_agp_init(struct radeon_device *rdev) return ret; } - rdev->mc.agp_base = rdev->ddev->agp->info.ai_aperture_base; - rdev->mc.gtt_size = rdev->ddev->agp->info.ai_aperture_size; + rdev->mc.agp_base = rdev->ddev->agp->agp_info.ai_aperture_base; + rdev->mc.gtt_size = rdev->ddev->agp->agp_info.ai_aperture_size; rdev->mc.gtt_start = rdev->mc.agp_base; rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; dev_info(rdev->dev, "GTT: %juM 0x%08jX - 0x%08jX\n", diff --git a/sys/dev/drm2/radeon/radeon_atombios.c b/sys/dev/drm2/radeon/radeon_atombios.c index 309f147..e00c8b3 100644 --- a/sys/dev/drm2/radeon/radeon_atombios.c +++ b/sys/dev/drm2/radeon/radeon_atombios.c @@ -35,6 +35,34 @@ __FBSDID("$FreeBSD$"); #include "atom.h" #include "atom-bits.h" +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +/* from radeon_encoder.c */ +extern uint32_t +radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, + uint8_t dac); +extern void radeon_link_encoder_connector(struct drm_device *dev); +extern void +radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, + uint32_t supported_device, u16 caps); + +/* from radeon_connector.c */ +extern void +radeon_add_atom_connector(struct drm_device *dev, + uint32_t connector_id, + uint32_t supported_device, + int connector_type, + struct radeon_i2c_bus_rec *i2c_bus, + uint32_t igp_lane_info, + uint16_t connector_object_id, + struct radeon_hpd *hpd, + struct radeon_router *router); + +/* from radeon_legacy_encoder.c */ +extern void +radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, + uint32_t supported_device); +#endif + /* local */ static int radeon_atom_get_max_vddc(struct radeon_device *rdev, u8 voltage_type, u16 voltage_id, u16 *voltage); @@ -904,7 +932,7 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct router.ddc_valid = false; router.cd_valid = false; - bios_connectors = malloc(bc_size, DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + bios_connectors = malloc(bc_size, DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!bios_connectors) return false; @@ -1532,7 +1560,7 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct (union lvds_info *)((char *)mode_info->atom_context->bios + data_offset); lvds = malloc(sizeof(struct radeon_encoder_atom_dig), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!lvds) return NULL; @@ -1619,7 +1647,7 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct struct edid *edid; int edid_size = max((int)EDID_LENGTH, (int)fake_edid_record->ucFakeEDIDLength); - edid = malloc(edid_size, DRM_MEM_KMS, M_WAITOK); + edid = malloc(edid_size, DRM_MEM_KMS, M_NOWAIT); if (edid) { memcpy((u8 *)edid, (u8 *)&fake_edid_record->ucFakeEDIDString[0], fake_edid_record->ucFakeEDIDLength); @@ -1671,7 +1699,7 @@ radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder) ((char *)mode_info->atom_context->bios + data_offset); p_dac = malloc(sizeof(struct radeon_encoder_primary_dac), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!p_dac) return NULL; @@ -1857,7 +1885,7 @@ radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder) ((char *)mode_info->atom_context->bios + data_offset); tv_dac = malloc(sizeof(struct radeon_encoder_tv_dac), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!tv_dac) return NULL; @@ -1992,13 +2020,13 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) /* add the i2c bus for thermal/fan chip */ if ((power_info->info.ucOverdriveThermalController > 0) && - (power_info->info.ucOverdriveThermalController < DRM_ARRAY_SIZE(thermal_controller_names))) { + (power_info->info.ucOverdriveThermalController < ARRAY_SIZE(thermal_controller_names))) { DRM_INFO("Possible %s thermal controller at 0x%02x\n", thermal_controller_names[power_info->info.ucOverdriveThermalController], power_info->info.ucOverdriveControllerAddress >> 1); i2c_bus = radeon_lookup_i2c_gpio(rdev, power_info->info.ucOverdriveI2cLine); rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (rdev->pm.i2c_bus) { struct i2c_board_info info = { }; const char *name = thermal_controller_names[power_info->info. @@ -2007,20 +2035,22 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) strlcpy(info.type, name, sizeof(info.type)); i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } num_modes = power_info->info.ucNumOfPowerModeEntries; if (num_modes > ATOM_MAX_NUMBEROF_POWER_BLOCK) num_modes = ATOM_MAX_NUMBEROF_POWER_BLOCK; + if (num_modes == 0) + return state_index; rdev->pm.power_state = malloc(sizeof(struct radeon_power_state) * num_modes, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rdev->pm.power_state) return state_index; /* last mode is usually default, array is low to high */ for (i = 0; i < num_modes; i++) { rdev->pm.power_state[state_index].clock_info = malloc(sizeof(struct radeon_pm_clock_info) * 1, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rdev->pm.power_state[state_index].clock_info) return state_index; rdev->pm.power_state[state_index].num_clock_modes = 1; @@ -2200,7 +2230,7 @@ static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r (controller->ucType == ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL)) { DRM_INFO("Special thermal controller config\n"); - } else if (controller->ucType < DRM_ARRAY_SIZE(pp_lib_thermal_controller_names)) { + } else if (controller->ucType < ARRAY_SIZE(pp_lib_thermal_controller_names)) { DRM_INFO("Possible %s thermal controller at 0x%02x %s fan control\n", pp_lib_thermal_controller_names[controller->ucType], controller->ucI2cAddress >> 1, @@ -2208,7 +2238,7 @@ static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with"); i2c_bus = radeon_lookup_i2c_gpio(rdev, controller->ucI2cLine); rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (rdev->pm.i2c_bus) { struct i2c_board_info info = { }; const char *name = pp_lib_thermal_controller_names[controller->ucType]; @@ -2216,7 +2246,7 @@ static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r strlcpy(info.type, name, sizeof(info.type)); i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } else { DRM_INFO("Unknown thermal controller type %d at 0x%02x %s fan control\n", controller->ucType, @@ -2420,9 +2450,11 @@ static int radeon_atombios_parse_power_table_4_5(struct radeon_device *rdev) power_info = (union power_info *)((char *)mode_info->atom_context->bios + data_offset); radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController); + if (power_info->pplib.ucNumStates == 0) + return state_index; rdev->pm.power_state = malloc(sizeof(struct radeon_power_state) * power_info->pplib.ucNumStates, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rdev->pm.power_state) return state_index; /* first mode is usually default, followed by low to high */ @@ -2440,7 +2472,7 @@ static int radeon_atombios_parse_power_table_4_5(struct radeon_device *rdev) rdev->pm.power_state[i].clock_info = malloc(sizeof(struct radeon_pm_clock_info) * ((power_info->pplib.ucStateEntrySize - 1) ? (power_info->pplib.ucStateEntrySize - 1) : 1), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rdev->pm.power_state[i].clock_info) return state_index; if (power_info->pplib.ucStateEntrySize - 1) { @@ -2503,6 +2535,7 @@ static int radeon_atombios_parse_power_table_6(struct radeon_device *rdev) int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo); u16 data_offset; u8 frev, crev; + u8 *power_state_offset; if (!atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, &crev, &data_offset)) @@ -2519,30 +2552,29 @@ static int radeon_atombios_parse_power_table_6(struct radeon_device *rdev) non_clock_info_array = (struct _NonClockInfoArray *) ((char *)mode_info->atom_context->bios + data_offset + le16_to_cpu(power_info->pplib.usNonClockInfoArrayOffset)); + if (state_array->ucNumEntries == 0) + return state_index; rdev->pm.power_state = malloc(sizeof(struct radeon_power_state) * state_array->ucNumEntries, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rdev->pm.power_state) return state_index; + power_state_offset = (u8 *)state_array->states; for (i = 0; i < state_array->ucNumEntries; i++) { mode_index = 0; - power_state = (union pplib_power_state *)&state_array->states[i]; - /* XXX this might be an inagua bug... */ - non_clock_array_index = i; /* power_state->v2.nonClockInfoIndex */ + power_state = (union pplib_power_state *)power_state_offset; + non_clock_array_index = power_state->v2.nonClockInfoIndex; non_clock_info = (struct _ATOM_PPLIB_NONCLOCK_INFO *) &non_clock_info_array->nonClockInfo[non_clock_array_index]; rdev->pm.power_state[i].clock_info = malloc(sizeof(struct radeon_pm_clock_info) * (power_state->v2.ucNumDPMLevels ? power_state->v2.ucNumDPMLevels : 1), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rdev->pm.power_state[i].clock_info) return state_index; if (power_state->v2.ucNumDPMLevels) { for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { clock_array_index = power_state->v2.clockInfoIndex[j]; - /* XXX this might be an inagua bug... */ - if (clock_array_index >= clock_info_array->ucNumEntries) - continue; clock_info = (union pplib_clock_info *) &clock_info_array->clockInfo[clock_array_index * clock_info_array->ucEntrySize]; valid = radeon_atombios_parse_pplib_clock_info(rdev, @@ -2564,6 +2596,7 @@ static int radeon_atombios_parse_power_table_6(struct radeon_device *rdev) non_clock_info); state_index++; } + power_state_offset += 2 + power_state->v2.ucNumDPMLevels; } /* if multiple clock modes, mark the lowest as no display */ for (i = 0; i < state_index; i++) { @@ -2610,13 +2643,15 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) default: break; } - } else { + } + + if (state_index == 0) { rdev->pm.power_state = malloc(sizeof(struct radeon_power_state), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->pm.power_state) { rdev->pm.power_state[0].clock_info = malloc(sizeof(struct radeon_pm_clock_info) * 1, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->pm.power_state[0].clock_info) { /* add the default mode */ rdev->pm.power_state[state_index].type = diff --git a/sys/dev/drm2/radeon/radeon_atpx_handler.c b/sys/dev/drm2/radeon/radeon_atpx_handler.c deleted file mode 100644 index 4cfd743..0000000 --- a/sys/dev/drm2/radeon/radeon_atpx_handler.c +++ /dev/null @@ -1,506 +0,0 @@ -/* - * Copyright (c) 2010 Red Hat Inc. - * Author : Dave Airlie <airlied@redhat.com> - * - * Licensed under GPLv2 - * - * ATPX support for both Intel/ATI - */ - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD$"); - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/bus.h> -#include <sys/linker.h> - -#include <contrib/dev/acpica/include/acpi.h> -#include <dev/acpica/acpivar.h> - -#include <dev/drm2/drmP.h> -#include <dev/drm2/radeon/radeon_drm.h> -#include "radeon_acpi.h" -#include "radeon_drv.h" - -#ifdef DUMBBELL_WIP -struct radeon_atpx_functions { - bool px_params; - bool power_cntl; - bool disp_mux_cntl; - bool i2c_mux_cntl; - bool switch_start; - bool switch_end; - bool disp_connectors_mapping; - bool disp_detetion_ports; -}; - -struct radeon_atpx { - ACPI_HANDLE handle; - struct radeon_atpx_functions functions; -}; - -static struct radeon_atpx_priv { - bool atpx_detected; - /* handle for device - and atpx */ - ACPI_HANDLE dhandle; - struct radeon_atpx atpx; -} radeon_atpx_priv; - -struct atpx_verify_interface { - u16 size; /* structure size in bytes (includes size field) */ - u16 version; /* version */ - u32 function_bits; /* supported functions bit vector */ -} __packed; - -struct atpx_power_control { - u16 size; - u8 dgpu_state; -} __packed; - -struct atpx_mux { - u16 size; - u16 mux; -} __packed; - -/** - * radeon_atpx_call - call an ATPX method - * - * @handle: acpi handle - * @function: the ATPX function to execute - * @params: ATPX function params - * - * Executes the requested ATPX function (all asics). - * Returns a pointer to the acpi output buffer. - */ -static ACPI_OBJECT *radeon_atpx_call(ACPI_HANDLE handle, int function, - ACPI_BUFFER *params) -{ - ACPI_STATUS status; - ACPI_OBJECT atpx_arg_elements[2]; - ACPI_OBJECT_LIST atpx_arg; - ACPI_BUFFER buffer = { ACPI_ALLOCATE_BUFFER, NULL }; - - atpx_arg.Count = 2; - atpx_arg.Pointer = &atpx_arg_elements[0]; - - atpx_arg_elements[0].Type = ACPI_TYPE_INTEGER; - atpx_arg_elements[0].Integer.Value = function; - - if (params) { - atpx_arg_elements[1].Type = ACPI_TYPE_BUFFER; - atpx_arg_elements[1].Buffer.Length = params->Length; - atpx_arg_elements[1].Buffer.Pointer = params->Pointer; - } else { - /* We need a second fake parameter */ - atpx_arg_elements[1].Type = ACPI_TYPE_INTEGER; - atpx_arg_elements[1].Integer.Value = 0; - } - - status = AcpiEvaluateObject(handle, NULL, &atpx_arg, &buffer); - - /* Fail only if calling the method fails and ATPX is supported */ - if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { - DRM_ERROR("failed to evaluate ATPX got %s\n", - AcpiFormatException(status)); - AcpiOsFree(buffer.Pointer); - return NULL; - } - - return buffer.Pointer; -} - -/** - * radeon_atpx_parse_functions - parse supported functions - * - * @f: supported functions struct - * @mask: supported functions mask from ATPX - * - * Use the supported functions mask from ATPX function - * ATPX_FUNCTION_VERIFY_INTERFACE to determine what functions - * are supported (all asics). - */ -static void radeon_atpx_parse_functions(struct radeon_atpx_functions *f, u32 mask) -{ - f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED; - f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED; - f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED; - f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED; - f->switch_start = mask & ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED; - f->switch_end = mask & ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED; - f->disp_connectors_mapping = mask & ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED; - f->disp_detetion_ports = mask & ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED; -} - -/** - * radeon_atpx_verify_interface - verify ATPX - * - * @handle: acpi handle - * @atpx: radeon atpx struct - * - * Execute the ATPX_FUNCTION_VERIFY_INTERFACE ATPX function - * to initialize ATPX and determine what features are supported - * (all asics). - * returns 0 on success, error on failure. - */ -static int radeon_atpx_verify_interface(struct radeon_atpx *atpx) -{ - ACPI_OBJECT *info; - struct atpx_verify_interface output; - size_t size; - int err = 0; - - info = radeon_atpx_call(atpx->handle, ATPX_FUNCTION_VERIFY_INTERFACE, NULL); - if (!info) - return -EIO; - - memset(&output, 0, sizeof(output)); - - size = *(u16 *) info->Buffer.Pointer; - if (size < 8) { - DRM_ERROR("ATPX buffer is too small: %zu\n", size); - err = -EINVAL; - goto out; - } - size = min(sizeof(output), size); - - memcpy(&output, info->Buffer.Pointer, size); - - /* TODO: check version? */ - DRM_INFO("ATPX version %u\n", output.version); - - radeon_atpx_parse_functions(&atpx->functions, output.function_bits); - -out: - AcpiOsFree(info); - return err; -} - -/** - * radeon_atpx_set_discrete_state - power up/down discrete GPU - * - * @atpx: atpx info struct - * @state: discrete GPU state (0 = power down, 1 = power up) - * - * Execute the ATPX_FUNCTION_POWER_CONTROL ATPX function to - * power down/up the discrete GPU (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_set_discrete_state(struct radeon_atpx *atpx, u8 state) -{ - ACPI_BUFFER params; - ACPI_OBJECT *info; - struct atpx_power_control input; - - if (atpx->functions.power_cntl) { - input.size = 3; - input.dgpu_state = state; - params.Length = input.size; - params.Pointer = &input; - info = radeon_atpx_call(atpx->handle, - ATPX_FUNCTION_POWER_CONTROL, - ¶ms); - if (!info) - return -EIO; - AcpiOsFree(info); - } - return 0; -} - -/** - * radeon_atpx_switch_disp_mux - switch display mux - * - * @atpx: atpx info struct - * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) - * - * Execute the ATPX_FUNCTION_DISPLAY_MUX_CONTROL ATPX function to - * switch the display mux between the discrete GPU and integrated GPU - * (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_switch_disp_mux(struct radeon_atpx *atpx, u16 mux_id) -{ - ACPI_BUFFER params; - ACPI_OBJECT *info; - struct atpx_mux input; - - if (atpx->functions.disp_mux_cntl) { - input.size = 4; - input.mux = mux_id; - params.Length = input.size; - params.Pointer = &input; - info = radeon_atpx_call(atpx->handle, - ATPX_FUNCTION_DISPLAY_MUX_CONTROL, - ¶ms); - if (!info) - return -EIO; - AcpiOsFree(info); - } - return 0; -} - -/** - * radeon_atpx_switch_i2c_mux - switch i2c/hpd mux - * - * @atpx: atpx info struct - * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) - * - * Execute the ATPX_FUNCTION_I2C_MUX_CONTROL ATPX function to - * switch the i2c/hpd mux between the discrete GPU and integrated GPU - * (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_switch_i2c_mux(struct radeon_atpx *atpx, u16 mux_id) -{ - ACPI_BUFFER params; - ACPI_OBJECT *info; - struct atpx_mux input; - - if (atpx->functions.i2c_mux_cntl) { - input.size = 4; - input.mux = mux_id; - params.Length = input.size; - params.Pointer = &input; - info = radeon_atpx_call(atpx->handle, - ATPX_FUNCTION_I2C_MUX_CONTROL, - ¶ms); - if (!info) - return -EIO; - AcpiOsFree(info); - } - return 0; -} - -/** - * radeon_atpx_switch_start - notify the sbios of a GPU switch - * - * @atpx: atpx info struct - * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) - * - * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION ATPX - * function to notify the sbios that a switch between the discrete GPU and - * integrated GPU has begun (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_switch_start(struct radeon_atpx *atpx, u16 mux_id) -{ - ACPI_BUFFER params; - ACPI_OBJECT *info; - struct atpx_mux input; - - if (atpx->functions.switch_start) { - input.size = 4; - input.mux = mux_id; - params.Length = input.size; - params.Pointer = &input; - info = radeon_atpx_call(atpx->handle, - ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION, - ¶ms); - if (!info) - return -EIO; - AcpiOsFree(info); - } - return 0; -} - -/** - * radeon_atpx_switch_end - notify the sbios of a GPU switch - * - * @atpx: atpx info struct - * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) - * - * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION ATPX - * function to notify the sbios that a switch between the discrete GPU and - * integrated GPU has ended (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_switch_end(struct radeon_atpx *atpx, u16 mux_id) -{ - ACPI_BUFFER params; - ACPI_OBJECT *info; - struct atpx_mux input; - - if (atpx->functions.switch_end) { - input.size = 4; - input.mux = mux_id; - params.Length = input.size; - params.Pointer = &input; - info = radeon_atpx_call(atpx->handle, - ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION, - ¶ms); - if (!info) - return -EIO; - AcpiOsFree(info); - } - return 0; -} - -/** - * radeon_atpx_switchto - switch to the requested GPU - * - * @id: GPU to switch to - * - * Execute the necessary ATPX functions to switch between the discrete GPU and - * integrated GPU (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_switchto(enum vga_switcheroo_client_id id) -{ - u16 gpu_id; - - if (id == VGA_SWITCHEROO_IGD) - gpu_id = ATPX_INTEGRATED_GPU; - else - gpu_id = ATPX_DISCRETE_GPU; - - radeon_atpx_switch_start(&radeon_atpx_priv.atpx, gpu_id); - radeon_atpx_switch_disp_mux(&radeon_atpx_priv.atpx, gpu_id); - radeon_atpx_switch_i2c_mux(&radeon_atpx_priv.atpx, gpu_id); - radeon_atpx_switch_end(&radeon_atpx_priv.atpx, gpu_id); - - return 0; -} - -/** - * radeon_atpx_power_state - power down/up the requested GPU - * - * @id: GPU to power down/up - * @state: requested power state (0 = off, 1 = on) - * - * Execute the necessary ATPX function to power down/up the discrete GPU - * (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_power_state(enum vga_switcheroo_client_id id, - enum vga_switcheroo_state state) -{ - /* on w500 ACPI can't change intel gpu state */ - if (id == VGA_SWITCHEROO_IGD) - return 0; - - radeon_atpx_set_discrete_state(&radeon_atpx_priv.atpx, state); - return 0; -} - -/** - * radeon_atpx_pci_probe_handle - look up the ATPX handle - * - * @pdev: pci device - * - * Look up the ATPX handles (all asics). - * Returns true if the handles are found, false if not. - */ -static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev) -{ - ACPI_HANDLE dhandle, atpx_handle; - ACPI_STATUS status; - - dhandle = DEVICE_ACPI_HANDLE(&pdev->dev); - if (!dhandle) - return false; - - status = AcpiGetHandle(dhandle, "ATPX", &atpx_handle); - if (ACPI_FAILURE(status)) - return false; - - radeon_atpx_priv.dhandle = dhandle; - radeon_atpx_priv.atpx.handle = atpx_handle; - return true; -} - -/** - * radeon_atpx_init - verify the ATPX interface - * - * Verify the ATPX interface (all asics). - * Returns 0 on success, error on failure. - */ -static int radeon_atpx_init(void) -{ - /* set up the ATPX handle */ - return radeon_atpx_verify_interface(&radeon_atpx_priv.atpx); -} - -/** - * radeon_atpx_get_client_id - get the client id - * - * @pdev: pci device - * - * look up whether we are the integrated or discrete GPU (all asics). - * Returns the client id. - */ -static int radeon_atpx_get_client_id(struct pci_dev *pdev) -{ - if (radeon_atpx_priv.dhandle == DEVICE_ACPI_HANDLE(&pdev->dev)) - return VGA_SWITCHEROO_IGD; - else - return VGA_SWITCHEROO_DIS; -} - -static struct vga_switcheroo_handler radeon_atpx_handler = { - .switchto = radeon_atpx_switchto, - .power_state = radeon_atpx_power_state, - .init = radeon_atpx_init, - .get_client_id = radeon_atpx_get_client_id, -}; - -/** - * radeon_atpx_detect - detect whether we have PX - * - * Check if we have a PX system (all asics). - * Returns true if we have a PX system, false if not. - */ -static bool radeon_atpx_detect(void) -{ - char acpi_method_name[255] = { 0 }; - ACPI_BUFFER buffer = {sizeof(acpi_method_name), acpi_method_name}; - struct pci_dev *pdev = NULL; - bool has_atpx = false; - int vga_count = 0; - - while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) { - vga_count++; - - has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true); - } - - if (has_atpx && vga_count == 2) { - AcpiGetName(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer); - DRM_INFO("VGA switcheroo: detected switching method %s handle\n", - acpi_method_name); - radeon_atpx_priv.atpx_detected = true; - return true; - } - return false; -} -#endif /* DUMBBELL_WIP */ - -/** - * radeon_register_atpx_handler - register with vga_switcheroo - * - * Register the PX callbacks with vga_switcheroo (all asics). - */ -void radeon_register_atpx_handler(void) -{ -#ifdef DUMBBELL_WIP - bool r; - - /* detect if we have any ATPX + 2 VGA in the system */ - r = radeon_atpx_detect(); - if (!r) - return; - - vga_switcheroo_register_handler(&radeon_atpx_handler); -#endif /* DUMBBELL_WIP */ -} - -/** - * radeon_unregister_atpx_handler - unregister with vga_switcheroo - * - * Unregister the PX callbacks with vga_switcheroo (all asics). - */ -void radeon_unregister_atpx_handler(void) -{ -#ifdef DUMBBELL_WIP - vga_switcheroo_unregister_handler(); -#endif /* DUMBBELL_WIP */ -} diff --git a/sys/dev/drm2/radeon/radeon_benchmark.c b/sys/dev/drm2/radeon/radeon_benchmark.c index ce39748..a90ebf6 100644 --- a/sys/dev/drm2/radeon/radeon_benchmark.c +++ b/sys/dev/drm2/radeon/radeon_benchmark.c @@ -139,13 +139,15 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, sdomain, ddomain, "dma"); } - time = radeon_benchmark_do_move(rdev, size, saddr, daddr, - RADEON_BENCHMARK_COPY_BLIT, n); - if (time < 0) - goto out_cleanup; - if (time > 0) - radeon_benchmark_log_results(n, size, time, - sdomain, ddomain, "blit"); + if (rdev->asic->copy.blit) { + time = radeon_benchmark_do_move(rdev, size, saddr, daddr, + RADEON_BENCHMARK_COPY_BLIT, n); + if (time < 0) + goto out_cleanup; + if (time > 0) + radeon_benchmark_log_results(n, size, time, + sdomain, ddomain, "blit"); + } out_cleanup: if (sobj) { diff --git a/sys/dev/drm2/radeon/radeon_bios.c b/sys/dev/drm2/radeon/radeon_bios.c index ee48268..ffb3756 100644 --- a/sys/dev/drm2/radeon/radeon_bios.c +++ b/sys/dev/drm2/radeon/radeon_bios.c @@ -46,7 +46,7 @@ __FBSDID("$FreeBSD$"); */ static bool igp_read_bios_from_vram(struct radeon_device *rdev) { - drm_local_map_t bios_map; + struct drm_local_map bios_map; uint8_t __iomem *bios; resource_size_t vram_base; resource_size_t size = 256 * 1024; /* ??? */ @@ -70,11 +70,11 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev) bios_map.flags = 0; bios_map.mtrr = 0; drm_core_ioremap(&bios_map, rdev->ddev); - if (bios_map.virtual == NULL) { + if (bios_map.handle == NULL) { DRM_INFO("%s: failed to ioremap\n", __func__); return false; } - bios = bios_map.virtual; + bios = bios_map.handle; size = bios_map.size; DRM_INFO("%s: Map address: %p (%ju bytes)\n", __func__, bios, (uintmax_t)size); @@ -88,7 +88,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev) drm_core_ioremapfree(&bios_map, rdev->ddev); return false; } - rdev->bios = malloc(size, DRM_MEM_DRIVER, M_WAITOK); + rdev->bios = malloc(size, DRM_MEM_DRIVER, M_NOWAIT); if (rdev->bios == NULL) { drm_core_ioremapfree(&bios_map, rdev->ddev); return false; @@ -125,12 +125,17 @@ static bool radeon_read_bios(struct radeon_device *rdev) vga_pci_unmap_bios(vga_dev, bios); return false; } - rdev->bios = malloc(size, DRM_MEM_DRIVER, M_WAITOK); + rdev->bios = malloc(size, DRM_MEM_DRIVER, M_NOWAIT); + if (rdev->bios == NULL) { + vga_pci_unmap_bios(vga_dev, bios); + return false; + } memcpy(rdev->bios, bios, size); vga_pci_unmap_bios(vga_dev, bios); return true; } +#ifdef CONFIG_ACPI /* ATRM is used to get the BIOS on the discrete cards in * dual-gpu systems. */ @@ -197,9 +202,9 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) return false; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) { -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ if ((dev = pci_find_class(PCIC_DISPLAY, PCIS_DISPLAY_VGA)) != NULL) { DRM_INFO("%s: pci_find_class() found: %d:%d:%d:%d, vendor=%04x, device=%04x\n", __func__, @@ -211,10 +216,10 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) pci_get_device(dev)); DRM_INFO("%s: Get ACPI device handle\n", __func__); dhandle = acpi_get_handle(dev); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (!dhandle) continue; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ if (!dhandle) return false; @@ -222,9 +227,9 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) status = AcpiGetHandle(dhandle, "ATRM", &atrm_handle); if (!ACPI_FAILURE(status)) { found = true; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP break; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } else { DRM_INFO("%s: Failed to get \"ATRM\" handle: %s\n", __func__, AcpiFormatException(status)); @@ -234,7 +239,7 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) if (!found) return false; - rdev->bios = malloc(size, DRM_MEM_DRIVER, M_WAITOK); + rdev->bios = malloc(size, DRM_MEM_DRIVER, M_NOWAIT); if (!rdev->bios) { DRM_ERROR("Unable to allocate bios\n"); return false; @@ -262,6 +267,12 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) } return true; } +#else +static inline bool radeon_atrm_get_bios(struct radeon_device *rdev) +{ + return false; +} +#endif static bool ni_read_disabled_bios(struct radeon_device *rdev) { @@ -620,6 +631,7 @@ static bool radeon_read_disabled_bios(struct radeon_device *rdev) return legacy_read_disabled_bios(rdev); } +#ifdef CONFIG_ACPI static bool radeon_acpi_vfct_bios(struct radeon_device *rdev) { bool ret = false; @@ -671,13 +683,20 @@ static bool radeon_acpi_vfct_bios(struct radeon_device *rdev) goto out_unmap; } - rdev->bios = malloc(vhdr->ImageLength, DRM_MEM_DRIVER, M_WAITOK); - memcpy(rdev->bios, &vbios->VbiosContent, vhdr->ImageLength); + rdev->bios = malloc(vhdr->ImageLength, DRM_MEM_DRIVER, M_NOWAIT); + if (rdev->bios) + memcpy(rdev->bios, &vbios->VbiosContent, vhdr->ImageLength); ret = !!rdev->bios; out_unmap: return ret; } +#else +static inline bool radeon_acpi_vfct_bios(struct radeon_device *rdev) +{ + return false; +} +#endif bool radeon_get_bios(struct radeon_device *rdev) { diff --git a/sys/dev/drm2/radeon/radeon_clocks.c b/sys/dev/drm2/radeon/radeon_clocks.c index 9ecd18a..4bd9f0d 100644 --- a/sys/dev/drm2/radeon/radeon_clocks.c +++ b/sys/dev/drm2/radeon/radeon_clocks.c @@ -405,19 +405,19 @@ void radeon_legacy_set_engine_clock(struct radeon_device *rdev, tmp &= ~RADEON_SCLK_SRC_SEL_MASK; WREG32_PLL(RADEON_SCLK_CNTL, tmp); - DRM_UDELAY(10); + udelay(10); tmp = RREG32_PLL(RADEON_SPLL_CNTL); tmp |= RADEON_SPLL_SLEEP; WREG32_PLL(RADEON_SPLL_CNTL, tmp); - DRM_UDELAY(2); + udelay(2); tmp = RREG32_PLL(RADEON_SPLL_CNTL); tmp |= RADEON_SPLL_RESET; WREG32_PLL(RADEON_SPLL_CNTL, tmp); - DRM_UDELAY(200); + udelay(200); tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); tmp &= ~(RADEON_SPLL_FB_DIV_MASK << RADEON_SPLL_FB_DIV_SHIFT); @@ -437,13 +437,13 @@ void radeon_legacy_set_engine_clock(struct radeon_device *rdev, tmp &= ~RADEON_SPLL_SLEEP; WREG32_PLL(RADEON_SPLL_CNTL, tmp); - DRM_UDELAY(2); + udelay(2); tmp = RREG32_PLL(RADEON_SPLL_CNTL); tmp &= ~RADEON_SPLL_RESET; WREG32_PLL(RADEON_SPLL_CNTL, tmp); - DRM_UDELAY(200); + udelay(200); tmp = RREG32_PLL(RADEON_SCLK_CNTL); tmp &= ~RADEON_SCLK_SRC_SEL_MASK; @@ -464,13 +464,13 @@ void radeon_legacy_set_engine_clock(struct radeon_device *rdev, } WREG32_PLL(RADEON_SCLK_CNTL, tmp); - DRM_UDELAY(20); + udelay(20); tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL); tmp |= RADEON_DONT_USE_XTALIN; WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp); - DRM_UDELAY(10); + udelay(10); } void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) @@ -638,7 +638,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) tmp &= ~(R300_SCLK_FORCE_VAP); tmp |= RADEON_SCLK_FORCE_CP; WREG32_PLL(RADEON_SCLK_CNTL, tmp); - DRM_MDELAY(15); + mdelay(15); tmp = RREG32_PLL(R300_SCLK_CNTL2); tmp &= ~(R300_SCLK_FORCE_TCL | @@ -656,12 +656,12 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) tmp |= (RADEON_ENGIN_DYNCLK_MODE | (0x01 << RADEON_ACTIVE_HILO_LAT_SHIFT)); WREG32_PLL(RADEON_CLK_PWRMGT_CNTL, tmp); - DRM_MDELAY(15); + mdelay(15); tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL); tmp |= RADEON_SCLK_DYN_START_CNTL; WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp); - DRM_MDELAY(15); + mdelay(15); /* When DRI is enabled, setting DYN_STOP_LAT to zero can cause some R200 to lockup randomly, leave them as set by BIOS. @@ -701,7 +701,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) tmp |= RADEON_SCLK_MORE_FORCEON; } WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); - DRM_MDELAY(15); + mdelay(15); } /* RV200::A11 A12, RV250::A11 A12 */ @@ -714,7 +714,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) tmp |= RADEON_TCL_BYPASS_DISABLE; WREG32_PLL(RADEON_PLL_PWRMGT_CNTL, tmp); } - DRM_MDELAY(15); + mdelay(15); /*enable dynamic mode for display clocks (PIXCLK and PIX2CLK) */ tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); @@ -727,14 +727,14 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) RADEON_PIXCLK_TMDS_ALWAYS_ONb); WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); - DRM_MDELAY(15); + mdelay(15); tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL); tmp |= (RADEON_PIXCLK_ALWAYS_ONb | RADEON_PIXCLK_DAC_ALWAYS_ONb); WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp); - DRM_MDELAY(15); + mdelay(15); } } else { /* Turn everything OFF (ForceON to everything) */ @@ -866,7 +866,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) } WREG32_PLL(RADEON_SCLK_CNTL, tmp); - DRM_MDELAY(16); + mdelay(16); if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) { @@ -875,7 +875,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) R300_SCLK_FORCE_GA | R300_SCLK_FORCE_CBA); WREG32_PLL(R300_SCLK_CNTL2, tmp); - DRM_MDELAY(16); + mdelay(16); } if (rdev->flags & RADEON_IS_IGP) { @@ -883,7 +883,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) tmp &= ~(RADEON_FORCEON_MCLKA | RADEON_FORCEON_YCLKA); WREG32_PLL(RADEON_MCLK_CNTL, tmp); - DRM_MDELAY(16); + mdelay(16); } if ((rdev->family == CHIP_RV200) || @@ -892,7 +892,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); tmp |= RADEON_SCLK_MORE_FORCEON; WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); - DRM_MDELAY(16); + mdelay(16); } tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); @@ -905,7 +905,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable) RADEON_PIXCLK_TMDS_ALWAYS_ONb); WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); - DRM_MDELAY(16); + mdelay(16); tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL); tmp &= ~(RADEON_PIXCLK_ALWAYS_ONb | diff --git a/sys/dev/drm2/radeon/radeon_combios.c b/sys/dev/drm2/radeon/radeon_combios.c index caa8a00..7d0fd61 100644 --- a/sys/dev/drm2/radeon/radeon_combios.c +++ b/sys/dev/drm2/radeon/radeon_combios.c @@ -41,6 +41,29 @@ __FBSDID("$FreeBSD$"); #include <asm/pci-bridge.h> #endif /* CONFIG_PPC_PMAC */ +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +/* from radeon_encoder.c */ +extern uint32_t +radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, + uint8_t dac); +extern void radeon_link_encoder_connector(struct drm_device *dev); + +/* from radeon_connector.c */ +extern void +radeon_add_legacy_connector(struct drm_device *dev, + uint32_t connector_id, + uint32_t supported_device, + int connector_type, + struct radeon_i2c_bus_rec *i2c_bus, + uint16_t connector_object_id, + struct radeon_hpd *hpd); + +/* from radeon_legacy_encoder.c */ +extern void +radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, + uint32_t supported_device); +#endif + /* old legacy ATI BIOS routines */ /* COMBIOS table offsets */ @@ -440,7 +463,7 @@ bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev) raw = rdev->bios + edid_info; size = EDID_LENGTH * (raw[0x7e] + 1); - edid = malloc(size, DRM_MEM_KMS, M_WAITOK); + edid = malloc(size, DRM_MEM_KMS, M_NOWAIT); if (edid == NULL) return false; @@ -464,7 +487,7 @@ radeon_bios_get_hardcoded_edid(struct radeon_device *rdev) if (rdev->mode_info.bios_hardcoded_edid) { edid = malloc(rdev->mode_info.bios_hardcoded_edid_size, - DRM_MEM_KMS, M_WAITOK); + DRM_MEM_KMS, M_NOWAIT); if (edid) { memcpy((unsigned char *)edid, (unsigned char *)rdev->mode_info.bios_hardcoded_edid, @@ -931,7 +954,7 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct int found = 0; p_dac = malloc(sizeof(struct radeon_encoder_primary_dac), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!p_dac) return NULL; @@ -954,6 +977,15 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct found = 1; } + /* quirks */ + /* Radeon 9100 (R200) */ + if ((dev->pci_device == 0x514D) && + (dev->pci_subvendor == 0x174B) && + (dev->pci_subdevice == 0x7149)) { + /* vbios value is bad, use the default */ + found = 0; + } + if (!found) /* fallback to defaults */ radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac); @@ -1067,7 +1099,7 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct int found = 0; tv_dac = malloc(sizeof(struct radeon_encoder_tv_dac), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!tv_dac) return NULL; @@ -1156,7 +1188,7 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct uint32_t lvds_ss_gen_cntl = RREG32(RADEON_LVDS_SS_GEN_CNTL); lvds = malloc(sizeof(struct radeon_encoder_lvds), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!lvds) return NULL; @@ -1232,7 +1264,7 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder if (lcd_info) { lvds = malloc(sizeof(struct radeon_encoder_lvds), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!lvds) return NULL; @@ -2690,15 +2722,15 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) /* allocate 2 power states */ rdev->pm.power_state = malloc(sizeof(struct radeon_power_state) * 2, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->pm.power_state) { /* allocate 1 clock mode per state */ rdev->pm.power_state[0].clock_info = malloc(sizeof(struct radeon_pm_clock_info) * 1, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); rdev->pm.power_state[1].clock_info = malloc(sizeof(struct radeon_pm_clock_info) * 1, - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rdev->pm.power_state[0].clock_info || !rdev->pm.power_state[1].clock_info) goto pm_failed; @@ -2743,13 +2775,13 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0); rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); if (rdev->pm.i2c_bus) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP struct i2c_board_info info = { }; const char *name = thermal_controller_names[thermal_controller]; info.addr = i2c_addr >> 1; strlcpy(info.type, name, sizeof(info.type)); i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } } } else { @@ -2762,7 +2794,7 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); if (rdev->pm.i2c_bus) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP struct i2c_board_info info = { }; const char *name = "f75375"; info.addr = 0x28; @@ -2770,7 +2802,7 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) i2c_new_device(&rdev->pm.i2c_bus->adapter, &info); DRM_INFO("Possible %s thermal controller at 0x%02x\n", name, info.addr); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } } } @@ -2974,12 +3006,12 @@ bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder) case 3: val = RBIOS16(index); index += 2; - DRM_UDELAY(val); + udelay(val); break; case 4: val = RBIOS16(index); index += 2; - DRM_MDELAY(val); + mdelay(val); break; case 6: slave_addr = id & 0xff; @@ -3028,7 +3060,7 @@ bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder) case 4: val = RBIOS16(index); index += 2; - DRM_UDELAY(val); + udelay(val); break; case 5: reg = id & 0x1fff; @@ -3106,7 +3138,7 @@ static void combios_parse_mmio_table(struct drm_device *dev, uint16_t offset) case 4: val = RBIOS16(offset); offset += 2; - DRM_UDELAY(val); + udelay(val); break; case 5: val = RBIOS16(offset); @@ -3175,10 +3207,10 @@ static void combios_parse_pll_table(struct drm_device *dev, uint16_t offset) tmp = 1000; switch (addr) { case 1: - DRM_UDELAY(150); + udelay(150); break; case 2: - DRM_MDELAY(1); + mdelay(1); break; case 3: while (tmp--) { @@ -3209,13 +3241,13 @@ static void combios_parse_pll_table(struct drm_device *dev, uint16_t offset) /*mclk_cntl |= 0x00001111;*//* ??? */ WREG32_PLL(RADEON_MCLK_CNTL, mclk_cntl); - DRM_MDELAY(10); + mdelay(10); #endif WREG32_PLL (RADEON_CLK_PWRMGT_CNTL, tmp & ~RADEON_CG_NO1_DEBUG_0); - DRM_MDELAY(10); + mdelay(10); } break; default: diff --git a/sys/dev/drm2/radeon/radeon_connectors.c b/sys/dev/drm2/radeon/radeon_connectors.c index d303dfa..8c55325 100644 --- a/sys/dev/drm2/radeon/radeon_connectors.c +++ b/sys/dev/drm2/radeon/radeon_connectors.c @@ -35,6 +35,17 @@ __FBSDID("$FreeBSD$"); #include "radeon.h" #include "atom.h" +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +extern void +radeon_combios_connected_scratch_regs(struct drm_connector *connector, + struct drm_encoder *encoder, + bool connected); +extern void +radeon_atombios_connected_scratch_regs(struct drm_connector *connector, + struct drm_encoder *encoder, + bool connected); +#endif + void radeon_connector_hotplug(struct drm_connector *connector) { struct drm_device *dev = connector->dev; @@ -641,9 +652,9 @@ static void radeon_connector_destroy(struct drm_connector *connector) if (radeon_connector->edid) free(radeon_connector->edid, DRM_MEM_KMS); free(radeon_connector->con_priv, DRM_MEM_DRIVER); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP drm_sysfs_connector_remove(connector); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ drm_connector_cleanup(connector); free(connector, DRM_MEM_DRIVER); } @@ -1211,9 +1222,9 @@ static void radeon_dp_connector_destroy(struct drm_connector *connector) if (radeon_dig_connector->dp_i2c_bus) radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus); free(radeon_connector->con_priv, DRM_MEM_DRIVER); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP drm_sysfs_connector_remove(connector); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ drm_connector_cleanup(connector); free(connector, DRM_MEM_DRIVER); } @@ -1555,7 +1566,7 @@ radeon_add_atom_connector(struct drm_device *dev, } radeon_connector = malloc(sizeof(struct radeon_connector), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_connector) return; @@ -1577,7 +1588,7 @@ radeon_add_atom_connector(struct drm_device *dev, if (is_dp_bridge) { radeon_dig_connector = malloc( sizeof(struct radeon_connector_atom_dig), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; @@ -1603,7 +1614,7 @@ radeon_add_atom_connector(struct drm_device *dev, connector->interlace_allowed = true; connector->doublescan_allowed = true; radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); break; @@ -1612,13 +1623,13 @@ radeon_add_atom_connector(struct drm_device *dev, case DRM_MODE_CONNECTOR_HDMIA: case DRM_MODE_CONNECTOR_HDMIB: case DRM_MODE_CONNECTOR_DisplayPort: - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); subpixel_order = SubPixelHorizontalRGB; @@ -1629,14 +1640,14 @@ radeon_add_atom_connector(struct drm_device *dev, connector->doublescan_allowed = false; if (connector_type == DRM_MODE_CONNECTOR_DVII) { radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); } break; case DRM_MODE_CONNECTOR_LVDS: case DRM_MODE_CONNECTOR_eDP: - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; @@ -1655,7 +1666,7 @@ radeon_add_atom_connector(struct drm_device *dev, DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); /* no HPD on analog connectors */ @@ -1673,7 +1684,7 @@ radeon_add_atom_connector(struct drm_device *dev, DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); /* no HPD on analog connectors */ @@ -1685,7 +1696,7 @@ radeon_add_atom_connector(struct drm_device *dev, case DRM_MODE_CONNECTOR_DVID: radeon_dig_connector = malloc( sizeof(struct radeon_connector_atom_dig), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; @@ -1698,23 +1709,23 @@ radeon_add_atom_connector(struct drm_device *dev, DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } subpixel_order = SubPixelHorizontalRGB; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.coherent_mode_property, 1); if (ASIC_IS_AVIVO(rdev)) { - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); } if (connector_type == DRM_MODE_CONNECTOR_DVII) { radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); } @@ -1728,7 +1739,7 @@ radeon_add_atom_connector(struct drm_device *dev, case DRM_MODE_CONNECTOR_HDMIB: radeon_dig_connector = malloc( sizeof(struct radeon_connector_atom_dig), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; @@ -1740,17 +1751,17 @@ radeon_add_atom_connector(struct drm_device *dev, if (!radeon_connector->ddc_bus) DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.coherent_mode_property, 1); if (ASIC_IS_AVIVO(rdev)) { - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); } @@ -1764,7 +1775,7 @@ radeon_add_atom_connector(struct drm_device *dev, case DRM_MODE_CONNECTOR_DisplayPort: radeon_dig_connector = malloc( sizeof(struct radeon_connector_atom_dig), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; @@ -1781,17 +1792,17 @@ radeon_add_atom_connector(struct drm_device *dev, DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } subpixel_order = SubPixelHorizontalRGB; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.coherent_mode_property, 1); if (ASIC_IS_AVIVO(rdev)) { - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_property, UNDERSCAN_OFF); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_hborder_property, 0); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.underscan_vborder_property, 0); } @@ -1802,7 +1813,7 @@ radeon_add_atom_connector(struct drm_device *dev, case DRM_MODE_CONNECTOR_eDP: radeon_dig_connector = malloc( sizeof(struct radeon_connector_atom_dig), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; @@ -1818,7 +1829,7 @@ radeon_add_atom_connector(struct drm_device *dev, if (!radeon_connector->ddc_bus) DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; @@ -1831,10 +1842,10 @@ radeon_add_atom_connector(struct drm_device *dev, drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type); drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs); radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.tv_std_property, radeon_atombios_get_tv_info(rdev)); /* no HPD on analog connectors */ @@ -1845,7 +1856,7 @@ radeon_add_atom_connector(struct drm_device *dev, case DRM_MODE_CONNECTOR_LVDS: radeon_dig_connector = malloc( sizeof(struct radeon_connector_atom_dig), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_dig_connector) goto failed; radeon_dig_connector->igp_lane_info = igp_lane_info; @@ -1857,7 +1868,7 @@ radeon_add_atom_connector(struct drm_device *dev, if (!radeon_connector->ddc_bus) DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; @@ -1874,9 +1885,9 @@ radeon_add_atom_connector(struct drm_device *dev, connector->polled = DRM_CONNECTOR_POLL_HPD; connector->display_info.subpixel_order = subpixel_order; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP drm_sysfs_connector_add(connector); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ return; failed: @@ -1918,7 +1929,7 @@ radeon_add_legacy_connector(struct drm_device *dev, } radeon_connector = malloc(sizeof(struct radeon_connector), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_connector) return; @@ -1939,7 +1950,7 @@ radeon_add_legacy_connector(struct drm_device *dev, DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); /* no HPD on analog connectors */ @@ -1957,7 +1968,7 @@ radeon_add_legacy_connector(struct drm_device *dev, DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); /* no HPD on analog connectors */ @@ -1976,7 +1987,7 @@ radeon_add_legacy_connector(struct drm_device *dev, } if (connector_type == DRM_MODE_CONNECTOR_DVII) { radeon_connector->dac_load_detect = true; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, 1); } @@ -2000,10 +2011,10 @@ radeon_add_legacy_connector(struct drm_device *dev, */ if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) radeon_connector->dac_load_detect = false; - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.load_detect_property, radeon_connector->dac_load_detect); - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, rdev->mode_info.tv_std_property, radeon_combios_get_tv_info(rdev)); /* no HPD on analog connectors */ @@ -2019,7 +2030,7 @@ radeon_add_legacy_connector(struct drm_device *dev, if (!radeon_connector->ddc_bus) DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); } - drm_connector_attach_property(&radeon_connector->base, + drm_object_attach_property(&radeon_connector->base.base, dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN); subpixel_order = SubPixelHorizontalRGB; @@ -2034,7 +2045,7 @@ radeon_add_legacy_connector(struct drm_device *dev, } else connector->polled = DRM_CONNECTOR_POLL_HPD; connector->display_info.subpixel_order = subpixel_order; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP drm_sysfs_connector_add(connector); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } diff --git a/sys/dev/drm2/radeon/radeon_cp.c b/sys/dev/drm2/radeon/radeon_cp.c index 4ec2773..e53c6d0 100644 --- a/sys/dev/drm2/radeon/radeon_cp.c +++ b/sys/dev/drm2/radeon/radeon_cp.c @@ -53,6 +53,16 @@ __FBSDID("$FreeBSD$"); #define FIRMWARE_RS600 "radeonkmsfw_RS600_cp" #define FIRMWARE_R520 "radeonkmsfw_R520_cp" +#ifdef __linux__ +MODULE_FIRMWARE(FIRMWARE_R100); +MODULE_FIRMWARE(FIRMWARE_R200); +MODULE_FIRMWARE(FIRMWARE_R300); +MODULE_FIRMWARE(FIRMWARE_R420); +MODULE_FIRMWARE(FIRMWARE_RS690); +MODULE_FIRMWARE(FIRMWARE_RS600); +MODULE_FIRMWARE(FIRMWARE_R520); +#endif + static int radeon_do_cleanup_cp(struct drm_device * dev); static void radeon_do_cp_start(drm_radeon_private_t * dev_priv); @@ -834,7 +844,7 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev, RADEON_WRITE(RADEON_LAST_CLEAR_REG, 0); /* reset sarea copies of these */ - master_priv = file_priv->masterp->driver_priv; + master_priv = file_priv->master->driver_priv; if (master_priv->sarea_priv) { master_priv->sarea_priv->last_frame = 0; master_priv->sarea_priv->last_dispatch = 0; @@ -1163,7 +1173,7 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; DRM_DEBUG("\n"); @@ -1655,7 +1665,6 @@ int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_pri return radeon_do_init_cp(dev, init, file_priv); case RADEON_INIT_R600_CP: return r600_do_init_cp(dev, init, file_priv); - break; case RADEON_CLEANUP_CP: if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) return r600_do_cleanup_cp(dev); @@ -2066,7 +2075,7 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags) int ret = 0; dev_priv = malloc(sizeof(drm_radeon_private_t), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (dev_priv == NULL) return -ENOMEM; @@ -2093,11 +2102,11 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags) break; } - pci_enable_busmaster(dev->device); + pci_enable_busmaster(dev->dev); - if (drm_device_is_agp(dev)) + if (drm_pci_device_is_agp(dev)) dev_priv->flags |= RADEON_IS_AGP; - else if (drm_device_is_pcie(dev)) + else if (drm_pci_device_is_pcie(dev)) dev_priv->flags |= RADEON_IS_PCIE; else dev_priv->flags |= RADEON_IS_PCI; @@ -2126,7 +2135,7 @@ int radeon_master_create(struct drm_device *dev, struct drm_master *master) int ret; master_priv = malloc(sizeof(*master_priv), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!master_priv) return -ENOMEM; @@ -2160,11 +2169,7 @@ void radeon_master_destroy(struct drm_device *dev, struct drm_master *master) master_priv->sarea_priv = NULL; if (master_priv->sarea) -#ifdef __linux__ drm_rmmap_locked(dev, master_priv->sarea); -#else - drm_rmmap(dev, master_priv->sarea); -#endif free(master_priv, DRM_MEM_DRIVER); diff --git a/sys/dev/drm2/radeon/radeon_cs.c b/sys/dev/drm2/radeon/radeon_cs.c index ee299fa..7adde83 100644 --- a/sys/dev/drm2/radeon/radeon_cs.c +++ b/sys/dev/drm2/radeon/radeon_cs.c @@ -51,12 +51,12 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) /* FIXME: we assume that each relocs use 4 dwords */ p->nrelocs = chunk->length_dw / 4; p->relocs_ptr = malloc(p->nrelocs * sizeof(void *), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (p->relocs_ptr == NULL) { return -ENOMEM; } p->relocs = malloc(p->nrelocs * sizeof(struct radeon_cs_reloc), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (p->relocs == NULL) { return -ENOMEM; } @@ -182,7 +182,7 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) p->chunk_flags_idx = -1; p->chunk_const_ib_idx = -1; p->chunks_array = malloc(cs->num_chunks * sizeof(uint64_t), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (p->chunks_array == NULL) { return -ENOMEM; } @@ -194,7 +194,7 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) p->cs_flags = 0; p->nchunks = cs->num_chunks; p->chunks = malloc(p->nchunks * sizeof(struct radeon_cs_chunk), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (p->chunks == NULL) { return -ENOMEM; } @@ -241,7 +241,7 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) if ((p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) || (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS)) { size = p->chunks[i].length_dw * sizeof(uint32_t); - p->chunks[i].kdata = malloc(size, DRM_MEM_DRIVER, M_WAITOK); + p->chunks[i].kdata = malloc(size, DRM_MEM_DRIVER, M_NOWAIT); if (p->chunks[i].kdata == NULL) { return -ENOMEM; } @@ -288,8 +288,8 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) return -EINVAL; } if (p->rdev && (p->rdev->flags & RADEON_IS_AGP)) { - p->chunks[p->chunk_ib_idx].kpage[0] = malloc(PAGE_SIZE, DRM_MEM_DRIVER, M_WAITOK); - p->chunks[p->chunk_ib_idx].kpage[1] = malloc(PAGE_SIZE, DRM_MEM_DRIVER, M_WAITOK); + p->chunks[p->chunk_ib_idx].kpage[0] = malloc(PAGE_SIZE, DRM_MEM_DRIVER, M_NOWAIT); + p->chunks[p->chunk_ib_idx].kpage[1] = malloc(PAGE_SIZE, DRM_MEM_DRIVER, M_NOWAIT); if (p->chunks[p->chunk_ib_idx].kpage[0] == NULL || p->chunks[p->chunk_ib_idx].kpage[1] == NULL) { free(p->chunks[p->chunk_ib_idx].kpage[0], DRM_MEM_DRIVER); diff --git a/sys/dev/drm2/radeon/radeon_device.c b/sys/dev/drm2/radeon/radeon_device.c index 370e541..e5c676b 100644 --- a/sys/dev/drm2/radeon/radeon_device.c +++ b/sys/dev/drm2/radeon/radeon_device.c @@ -248,7 +248,7 @@ void radeon_wb_fini(struct radeon_device *rdev) int radeon_wb_init(struct radeon_device *rdev) { int r; - void *wb_ptr; + void *wb_ptr; /* FreeBSD: to please GCC 4.2. */ if (rdev->wb.wb_obj == NULL) { r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, @@ -430,11 +430,11 @@ bool radeon_card_posted(struct radeon_device *rdev) { uint32_t reg; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (efi_enabled(EFI_BOOT) && rdev->dev->pci_subvendor == PCI_VENDOR_ID_APPLE) return false; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* first check CRTCs */ if (ASIC_IS_DCE41(rdev)) { @@ -548,7 +548,7 @@ int radeon_dummy_page_init(struct radeon_device *rdev) if (rdev->dummy_page.dmah) return 0; rdev->dummy_page.dmah = drm_pci_alloc(rdev->ddev, - PAGE_SIZE, PAGE_SIZE, BUS_SPACE_MAXSIZE_32BIT); + PAGE_SIZE, PAGE_SIZE, BUS_SPACE_MAXADDR_32BIT); if (rdev->dummy_page.dmah == NULL) return -ENOMEM; rdev->dummy_page.addr = rdev->dummy_page.dmah->busaddr; @@ -731,7 +731,7 @@ int radeon_atombios_init(struct radeon_device *rdev) { struct card_info *atom_card_info = malloc(sizeof(struct card_info), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!atom_card_info) return -ENOMEM; @@ -814,7 +814,7 @@ void radeon_combios_fini(struct radeon_device *rdev) { } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP /* if we get transitioned to only one device, take VGA back */ /** * radeon_vga_set_decode - enable/disable vga decode @@ -835,7 +835,7 @@ static unsigned int radeon_vga_set_decode(void *cookie, bool state) else return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /** * radeon_check_pot_argument - check that argument is a power of two @@ -903,7 +903,7 @@ static void radeon_check_arguments(struct radeon_device *rdev) * * @pdev: pci dev pointer */ -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static bool radeon_switcheroo_quirk_long_wakeup(struct pci_dev *pdev) { @@ -916,7 +916,7 @@ static bool radeon_switcheroo_quirk_long_wakeup(struct pci_dev *pdev) return false; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /** * radeon_switcheroo_set_state - set switcheroo state @@ -927,7 +927,7 @@ static bool radeon_switcheroo_quirk_long_wakeup(struct pci_dev *pdev) * Callback for the switcheroo driver. Suspends or resumes the * the asics before or after it is powered up using ACPI methods. */ -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switcheroo_state state) { struct drm_device *dev = pci_get_drvdata(pdev); @@ -956,7 +956,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero dev->switch_power_state = DRM_SWITCH_POWER_OFF; } } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /** * radeon_switcheroo_can_switch - see if switcheroo state can change @@ -967,7 +967,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero * state can be changed. * Returns true if the state can be changed, false if not. */ -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static bool radeon_switcheroo_can_switch(struct pci_dev *pdev) { struct drm_device *dev = pci_get_drvdata(pdev); @@ -984,7 +984,7 @@ static const struct vga_switcheroo_client_ops radeon_switcheroo_ops = { .reprobe = NULL, .can_switch = radeon_switcheroo_can_switch, }; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /** * radeon_device_init - initialize the driver @@ -1005,7 +1005,7 @@ int radeon_device_init(struct radeon_device *rdev, int dma_bits; rdev->shutdown = false; - rdev->dev = ddev->device; + rdev->dev = ddev->dev; rdev->ddev = ddev; rdev->flags = flags; rdev->family = flags & RADEON_FAMILY_MASK; @@ -1079,7 +1079,7 @@ int radeon_device_init(struct radeon_device *rdev, rdev->need_dma32 = true; dma_bits = rdev->need_dma32 ? 32 : 40; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits)); if (r) { rdev->need_dma32 = true; @@ -1091,7 +1091,7 @@ int radeon_device_init(struct radeon_device *rdev, pci_set_consistent_dma_mask(rdev->pdev, DMA_BIT_MASK(32)); printk(KERN_WARNING "radeon: No coherent DMA available.\n"); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* Registers mapping */ /* TODO: block userspace mapping of io register */ @@ -1127,13 +1127,13 @@ int radeon_device_init(struct radeon_device *rdev, taskqueue_thread_enqueue, &rdev->tq); taskqueue_start_threads(&rdev->tq, 1, PWAIT, "radeon taskq"); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP /* if we have > 1 VGA cards, then disable the radeon VGA resources */ /* this will fail for cards that aren't VGA class devices, just * ignore it */ vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ r = radeon_init(rdev); if (r) @@ -1200,9 +1200,9 @@ int radeon_device_init(struct radeon_device *rdev, return 0; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static void radeon_debugfs_remove_files(struct radeon_device *rdev); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /** * radeon_device_fini - tear down the driver @@ -1233,10 +1233,10 @@ void radeon_device_fini(struct radeon_device *rdev) #endif radeon_fini(rdev); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP vga_switcheroo_unregister_client(rdev->pdev); vga_client_register(rdev->pdev, NULL, NULL, NULL); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ if (rdev->tq != NULL) { taskqueue_free(rdev->tq); @@ -1250,9 +1250,9 @@ void radeon_device_fini(struct radeon_device *rdev) bus_release_resource(rdev->dev, SYS_RES_MEMORY, rdev->rmmio_rid, rdev->rmmio); rdev->rmmio = NULL; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP radeon_debugfs_remove_files(rdev); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } @@ -1280,11 +1280,11 @@ int radeon_suspend_kms(struct drm_device *dev) if (dev == NULL || dev->dev_private == NULL) { return -ENODEV; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (state.event == PM_EVENT_PRETHAW) { return 0; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ rdev = dev->dev_private; if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) @@ -1342,21 +1342,21 @@ int radeon_suspend_kms(struct drm_device *dev) radeon_agp_suspend(rdev); - pci_save_state(device_get_parent(rdev->dev)); -#ifdef DUMBBELL_WIP + pci_save_state(device_get_parent(dev->dev)); +#ifdef FREEBSD_WIP if (state.event == PM_EVENT_SUSPEND) { /* Shut down the device */ pci_disable_device(dev->pdev); -#endif /* DUMBBELL_WIP */ - pci_set_powerstate(dev->device, PCI_POWERSTATE_D3); -#ifdef DUMBBELL_WIP +#endif /* FREEBSD_WIP */ + pci_set_powerstate(dev->dev, PCI_POWERSTATE_D3); +#ifdef FREEBSD_WIP } console_lock(); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ radeon_fbdev_set_suspend(rdev, 1); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP console_unlock(); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ return 0; } @@ -1378,17 +1378,17 @@ int radeon_resume_kms(struct drm_device *dev) if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) return 0; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP console_lock(); -#endif /* DUMBBELL_WIP */ - pci_set_powerstate(dev->device, PCI_POWERSTATE_D0); - pci_restore_state(device_get_parent(rdev->dev)); -#ifdef DUMBBELL_WIP +#endif /* FREEBSD_WIP */ + pci_set_powerstate(device_get_parent(dev->dev), PCI_POWERSTATE_D0); + pci_restore_state(device_get_parent(dev->dev)); +#ifdef FREEBSD_WIP if (pci_enable_device(dev->pdev)) { console_unlock(); return -1; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* resume AGP if in use */ radeon_agp_resume(rdev); radeon_resume(rdev); @@ -1401,9 +1401,9 @@ int radeon_resume_kms(struct drm_device *dev) radeon_restore_bios_scratch_regs(rdev); radeon_fbdev_set_suspend(rdev, 0); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP console_unlock(); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* init dig PHYs, disp eng pll */ if (rdev->is_atom_bios) { @@ -1513,7 +1513,7 @@ retry: /* * Debugfs */ -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP int radeon_debugfs_add_files(struct radeon_device *rdev, struct drm_info_list *files, unsigned nfiles) @@ -1573,5 +1573,5 @@ int radeon_debugfs_init(struct drm_minor *minor) void radeon_debugfs_cleanup(struct drm_minor *minor) { } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ #endif diff --git a/sys/dev/drm2/radeon/radeon_display.c b/sys/dev/drm2/radeon/radeon_display.c index ee74ed4..1f9b917 100644 --- a/sys/dev/drm2/radeon/radeon_display.c +++ b/sys/dev/drm2/radeon/radeon_display.c @@ -363,7 +363,7 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc, u64 base; int r; - work = malloc(sizeof *work, DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + work = malloc(sizeof *work, DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (work == NULL) return -ENOMEM; @@ -511,7 +511,7 @@ static void radeon_crtc_init(struct drm_device *dev, int index) struct radeon_crtc *radeon_crtc; int i; - radeon_crtc = malloc(sizeof(struct radeon_crtc) + (RADEONFB_CONN_LIMIT * sizeof(struct drm_connector *)), DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + radeon_crtc = malloc(sizeof(struct radeon_crtc) + (RADEONFB_CONN_LIMIT * sizeof(struct drm_connector *)), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (radeon_crtc == NULL) return; @@ -1112,12 +1112,12 @@ radeon_user_framebuffer_create(struct drm_device *dev, obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]); if (obj == NULL) { - dev_err(dev->device, "No GEM object associated to handle 0x%08X, " + dev_err(dev->dev, "No GEM object associated to handle 0x%08X, " "can't create framebuffer\n", mode_cmd->handles[0]); return -ENOENT; } - radeon_fb = malloc(sizeof(*radeon_fb), DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + radeon_fb = malloc(sizeof(*radeon_fb), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (radeon_fb == NULL) { drm_gem_object_unreference_unlocked(obj); return (-ENOMEM); @@ -1179,7 +1179,7 @@ static int radeon_modeset_create_props(struct radeon_device *rdev) } if (!ASIC_IS_AVIVO(rdev)) { - sz = DRM_ARRAY_SIZE(radeon_tmds_pll_enum_list); + sz = ARRAY_SIZE(radeon_tmds_pll_enum_list); rdev->mode_info.tmds_pll_property = drm_property_create_enum(rdev->ddev, 0, "tmds_pll", @@ -1193,13 +1193,13 @@ static int radeon_modeset_create_props(struct radeon_device *rdev) drm_mode_create_scaling_mode_property(rdev->ddev); - sz = DRM_ARRAY_SIZE(radeon_tv_std_enum_list); + sz = ARRAY_SIZE(radeon_tv_std_enum_list); rdev->mode_info.tv_std_property = drm_property_create_enum(rdev->ddev, 0, "tv standard", radeon_tv_std_enum_list, sz); - sz = DRM_ARRAY_SIZE(radeon_underscan_enum_list); + sz = ARRAY_SIZE(radeon_underscan_enum_list); rdev->mode_info.underscan_property = drm_property_create_enum(rdev->ddev, 0, "underscan", @@ -1256,38 +1256,38 @@ static void radeon_afmt_init(struct radeon_device *rdev) /* DCE4/5 has 6 audio blocks tied to DIG encoders */ /* DCE4.1 has 2 audio blocks tied to DIG encoders */ rdev->mode_info.afmt[0] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[0]) { rdev->mode_info.afmt[0]->offset = EVERGREEN_CRTC0_REGISTER_OFFSET; rdev->mode_info.afmt[0]->id = 0; } rdev->mode_info.afmt[1] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[1]) { rdev->mode_info.afmt[1]->offset = EVERGREEN_CRTC1_REGISTER_OFFSET; rdev->mode_info.afmt[1]->id = 1; } if (!ASIC_IS_DCE41(rdev)) { rdev->mode_info.afmt[2] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[2]) { rdev->mode_info.afmt[2]->offset = EVERGREEN_CRTC2_REGISTER_OFFSET; rdev->mode_info.afmt[2]->id = 2; } rdev->mode_info.afmt[3] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[3]) { rdev->mode_info.afmt[3]->offset = EVERGREEN_CRTC3_REGISTER_OFFSET; rdev->mode_info.afmt[3]->id = 3; } rdev->mode_info.afmt[4] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[4]) { rdev->mode_info.afmt[4]->offset = EVERGREEN_CRTC4_REGISTER_OFFSET; rdev->mode_info.afmt[4]->id = 4; } rdev->mode_info.afmt[5] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[5]) { rdev->mode_info.afmt[5]->offset = EVERGREEN_CRTC5_REGISTER_OFFSET; rdev->mode_info.afmt[5]->id = 5; @@ -1296,13 +1296,13 @@ static void radeon_afmt_init(struct radeon_device *rdev) } else if (ASIC_IS_DCE3(rdev)) { /* DCE3.x has 2 audio blocks tied to DIG encoders */ rdev->mode_info.afmt[0] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[0]) { rdev->mode_info.afmt[0]->offset = DCE3_HDMI_OFFSET0; rdev->mode_info.afmt[0]->id = 0; } rdev->mode_info.afmt[1] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[1]) { rdev->mode_info.afmt[1]->offset = DCE3_HDMI_OFFSET1; rdev->mode_info.afmt[1]->id = 1; @@ -1310,7 +1310,7 @@ static void radeon_afmt_init(struct radeon_device *rdev) } else if (ASIC_IS_DCE2(rdev)) { /* DCE2 has at least 1 routable audio block */ rdev->mode_info.afmt[0] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[0]) { rdev->mode_info.afmt[0]->offset = DCE2_HDMI_OFFSET0; rdev->mode_info.afmt[0]->id = 0; @@ -1318,7 +1318,7 @@ static void radeon_afmt_init(struct radeon_device *rdev) /* r6xx has 2 routable audio blocks */ if (rdev->family >= CHIP_R600) { rdev->mode_info.afmt[1] = malloc(sizeof(struct radeon_afmt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->mode_info.afmt[1]) { rdev->mode_info.afmt[1]->offset = DCE2_HDMI_OFFSET1; rdev->mode_info.afmt[1]->id = 1; @@ -1419,9 +1419,7 @@ void radeon_modeset_fini(struct radeon_device *rdev) radeon_afmt_fini(rdev); drm_kms_helper_poll_fini(rdev->ddev); radeon_hpd_fini(rdev); - DRM_UNLOCK(rdev->ddev); /* Work around lock recursion. dumbbell@ */ drm_mode_config_cleanup(rdev->ddev); - DRM_LOCK(rdev->ddev); rdev->mode_info.mode_config_initialized = false; } /* free i2c buses */ diff --git a/sys/dev/drm2/radeon/radeon_drm.h b/sys/dev/drm2/radeon/radeon_drm.h index e84500c..a339753 100644 --- a/sys/dev/drm2/radeon/radeon_drm.h +++ b/sys/dev/drm2/radeon/radeon_drm.h @@ -760,7 +760,7 @@ typedef struct drm_radeon_irq_wait { typedef struct drm_radeon_setparam { unsigned int param; - int64_t value; + __s64 value; } drm_radeon_setparam_t; #define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */ diff --git a/sys/dev/drm2/radeon/radeon_drv.c b/sys/dev/drm2/radeon/radeon_drv.c index 37b4e26..7c433c6 100644 --- a/sys/dev/drm2/radeon/radeon_drv.c +++ b/sys/dev/drm2/radeon/radeon_drv.c @@ -85,13 +85,9 @@ extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, int *vpos, int *hpos); extern struct drm_ioctl_desc radeon_ioctls_kms[]; extern int radeon_max_kms_ioctl; -#ifdef COMPAT_FREEBSD32 -extern struct drm_ioctl_desc radeon_compat_ioctls[]; -extern int radeon_num_compat_ioctls; -#endif -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP int radeon_mmap(struct file *filp, struct vm_area_struct *vma); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ int radeon_mode_dumb_mmap(struct drm_file *filp, struct drm_device *dev, uint32_t handle, uint64_t *offset_p); @@ -131,7 +127,6 @@ int radeon_pcie_gen2 = -1; int radeon_msi = -1; int radeon_lockup_timeout = 10000; -#ifdef DUMBBELL_WIP MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); module_param_named(no_wb, radeon_no_wb, int, 0444); @@ -183,165 +178,11 @@ module_param_named(msi, radeon_msi, int, 0444); MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); -static int radeon_suspend(struct drm_device *dev, pm_message_t state) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) - return 0; - - /* Disable *all* interrupts */ - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) - RADEON_WRITE(R500_DxMODE_INT_MASK, 0); - RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); - return 0; -} - -static int radeon_resume(struct drm_device *dev) -{ - drm_radeon_private_t *dev_priv = dev->dev_private; - - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) - return 0; - - /* Restore interrupt registers */ - if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) - RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); - RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); - return 0; -} -#endif /* DUMBBELL_WIP */ - static drm_pci_id_list_t pciidlist[] = { radeon_PCI_IDS }; -#ifdef DUMBBELL_WIP -static const struct file_operations radeon_driver_old_fops = { - .owner = THIS_MODULE, - .open = drm_open, - .release = drm_release, - .unlocked_ioctl = drm_ioctl, - .mmap = drm_mmap, - .poll = drm_poll, - .fasync = drm_fasync, - .read = drm_read, -#ifdef CONFIG_COMPAT - .compat_ioctl = radeon_compat_ioctl, -#endif - .llseek = noop_llseek, -}; - -static struct drm_driver driver_old = { - .driver_features = - DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | - DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, - .dev_priv_size = sizeof(drm_radeon_buf_priv_t), - .load = radeon_driver_load, - .firstopen = radeon_driver_firstopen, - .open = radeon_driver_open, - .preclose = radeon_driver_preclose, - .postclose = radeon_driver_postclose, - .lastclose = radeon_driver_lastclose, - .unload = radeon_driver_unload, -#ifdef DUMBBELL_WIP - .suspend = radeon_suspend, - .resume = radeon_resume, -#endif /* DUMBBELL_WIP */ - .get_vblank_counter = radeon_get_vblank_counter, - .enable_vblank = radeon_enable_vblank, - .disable_vblank = radeon_disable_vblank, - .master_create = radeon_master_create, - .master_destroy = radeon_master_destroy, - .irq_preinstall = radeon_driver_irq_preinstall, - .irq_postinstall = radeon_driver_irq_postinstall, - .irq_uninstall = radeon_driver_irq_uninstall, - .irq_handler = radeon_driver_irq_handler, - .ioctls = radeon_ioctls, - .dma_ioctl = radeon_cp_buffers, - .fops = &radeon_driver_old_fops, - .name = DRIVER_NAME, - .desc = DRIVER_DESC, - .date = DRIVER_DATE, - .major = DRIVER_MAJOR, - .minor = DRIVER_MINOR, - .patchlevel = DRIVER_PATCHLEVEL, -}; -#endif /* DUMBBELL_WIP */ - -static struct drm_driver_info kms_driver; - -#ifdef DUMBBELL_WIP -static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) -{ - struct apertures_struct *ap; - bool primary = false; - - ap = alloc_apertures(1); - if (!ap) - return -ENOMEM; - - ap->ranges[0].base = pci_resource_start(pdev, 0); - ap->ranges[0].size = pci_resource_len(pdev, 0); - -#ifdef CONFIG_X86 - primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; -#endif - remove_conflicting_framebuffers(ap, "radeondrmfb", primary); - kfree(ap); - - return 0; -} - -static int radeon_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - int ret; - - /* Get rid of things like offb */ - ret = radeon_kick_out_firmware_fb(pdev); - if (ret) - return ret; - - return drm_get_pci_dev(pdev, ent, &kms_driver); -} - -static void -radeon_pci_remove(struct pci_dev *pdev) -{ - struct drm_device *dev = pci_get_drvdata(pdev); - - drm_put_dev(dev); -} - -static int -radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state) -{ - struct drm_device *dev = pci_get_drvdata(pdev); - return radeon_suspend_kms(dev, state); -} - -static int -radeon_pci_resume(struct pci_dev *pdev) -{ - struct drm_device *dev = pci_get_drvdata(pdev); - return radeon_resume_kms(dev); -} - -static const struct file_operations radeon_driver_kms_fops = { - .owner = THIS_MODULE, - .open = drm_open, - .release = drm_release, - .unlocked_ioctl = drm_ioctl, - .mmap = radeon_mmap, - .poll = drm_poll, - .fasync = drm_fasync, - .read = drm_read, -#ifdef CONFIG_COMPAT - .compat_ioctl = radeon_kms_compat_ioctl, -#endif -}; -#endif /* DUMBBELL_WIP */ +static struct drm_driver kms_driver; static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ctx, struct sysctl_oid *top) @@ -349,31 +190,34 @@ static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ct return drm_add_busid_modesetting(dev, ctx, top); } -static struct drm_driver_info kms_driver = { +static struct drm_driver kms_driver = { .driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM | - DRIVER_PRIME /* | DRIVE_MODESET */, -#ifdef DUMBBELL_WIP + DRIVER_PRIME, +#ifdef FREEBSD_WIP .dev_priv_size = 0, -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ .load = radeon_driver_load_kms, - .use_msi = radeon_msi_ok, .firstopen = radeon_driver_firstopen_kms, .open = radeon_driver_open_kms, .preclose = radeon_driver_preclose_kms, .postclose = radeon_driver_postclose_kms, .lastclose = radeon_driver_lastclose_kms, .unload = radeon_driver_unload_kms, -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP .suspend = radeon_suspend_kms, .resume = radeon_resume_kms, -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ .get_vblank_counter = radeon_get_vblank_counter_kms, .enable_vblank = radeon_enable_vblank_kms, .disable_vblank = radeon_disable_vblank_kms, .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, .get_scanout_position = radeon_get_crtc_scanoutpos, +#if defined(CONFIG_DEBUG_FS) + .debugfs_init = radeon_debugfs_init, + .debugfs_cleanup = radeon_debugfs_cleanup, +#endif .irq_preinstall = radeon_driver_irq_preinstall_kms, .irq_postinstall = radeon_driver_irq_postinstall_kms, .irq_uninstall = radeon_driver_irq_uninstall_kms, @@ -388,16 +232,16 @@ static struct drm_driver_info kms_driver = { .dumb_create = radeon_mode_dumb_create, .dumb_map_offset = radeon_mode_dumb_mmap, .dumb_destroy = radeon_mode_dumb_destroy, -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP .fops = &radeon_driver_kms_fops, -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_export = radeon_gem_prime_export, .gem_prime_import = radeon_gem_prime_import, -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ .name = DRIVER_NAME, .desc = DRIVER_DESC, @@ -407,7 +251,7 @@ static struct drm_driver_info kms_driver = { .patchlevel = KMS_DRIVER_PATCHLEVEL, }; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static int __init radeon_init(void) { driver = &driver_old; @@ -450,7 +294,7 @@ static void __exit radeon_exit(void) drm_pci_exit(driver, pdriver); radeon_unregister_atpx_handler(); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* =================================================================== */ @@ -458,26 +302,23 @@ static int radeon_probe(device_t kdev) { - return drm_probe(kdev, pciidlist); + return (-drm_probe_helper(kdev, pciidlist)); } static int radeon_attach(device_t kdev) { - struct drm_device *dev; - dev = device_get_softc(kdev); if (radeon_modeset == 1) { kms_driver.driver_features |= DRIVER_MODESET; - kms_driver.max_ioctl = radeon_max_kms_ioctl; + kms_driver.num_ioctls = radeon_max_kms_ioctl; #ifdef COMPAT_FREEBSD32 kms_driver.compat_ioctls = radeon_compat_ioctls; - kms_driver.compat_ioctls_nr = &radeon_num_compat_ioctls; + kms_driver.num_compat_ioctls = &radeon_num_compat_ioctls; #endif radeon_register_atpx_handler(); } - dev->driver = &kms_driver; - return (drm_attach(kdev, pciidlist)); + return (-drm_attach_helper(kdev, pciidlist, &kms_driver)); } static int @@ -488,8 +329,12 @@ radeon_suspend(device_t kdev) dev = device_get_softc(kdev); ret = radeon_suspend_kms(dev); + if (ret) + return (-ret); - return (-ret); + ret = bus_generic_suspend(kdev); + + return (ret); } static int @@ -500,8 +345,12 @@ radeon_resume(device_t kdev) dev = device_get_softc(kdev); ret = radeon_resume_kms(dev); + if (ret) + return (-ret); + + ret = bus_generic_resume(kdev); - return (-ret); + return (ret); } extern struct fb_info * radeon_fb_helper_getinfo(device_t kdev); @@ -512,7 +361,7 @@ static device_method_t radeon_methods[] = { DEVMETHOD(device_attach, radeon_attach), DEVMETHOD(device_suspend, radeon_suspend), DEVMETHOD(device_resume, radeon_resume), - DEVMETHOD(device_detach, drm_detach), + DEVMETHOD(device_detach, drm_generic_detach), /* Framebuffer service methods */ DEVMETHOD(fb_getinfo, radeon_fb_helper_getinfo), diff --git a/sys/dev/drm2/radeon/radeon_drv.h b/sys/dev/drm2/radeon/radeon_drv.h index 99c6aa4..af05bbf 100644 --- a/sys/dev/drm2/radeon/radeon_drv.h +++ b/sys/dev/drm2/radeon/radeon_drv.h @@ -328,6 +328,10 @@ typedef struct drm_radeon_kcmd_buffer { extern int radeon_no_wb; extern struct drm_ioctl_desc radeon_ioctls[]; extern int radeon_max_ioctl; +#ifdef COMPAT_FREEBSD32 +extern struct drm_ioctl_desc radeon_compat_ioctls[]; +extern int radeon_num_compat_ioctls; +#endif extern u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv); extern void radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val); @@ -463,8 +467,13 @@ extern void r600_blit_swap(struct drm_device *dev, int w, int h, int src_pitch, int dst_pitch, int cpp); /* atpx handler */ +#if defined(CONFIG_VGA_SWITCHEROO) void radeon_register_atpx_handler(void); void radeon_unregister_atpx_handler(void); +#else +static inline void radeon_register_atpx_handler(void) {} +static inline void radeon_unregister_atpx_handler(void) {} +#endif /* Flags for stats.boxes */ @@ -2004,7 +2013,7 @@ do { \ #define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ do { \ - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv;\ + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; \ drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv; \ if ( sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \ int __ret; \ diff --git a/sys/dev/drm2/radeon/radeon_fb.c b/sys/dev/drm2/radeon/radeon_fb.c index 7b976b6..6ed52d9 100644 --- a/sys/dev/drm2/radeon/radeon_fb.c +++ b/sys/dev/drm2/radeon/radeon_fb.c @@ -219,7 +219,12 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev, rbo = gem_to_radeon_bo(gobj); - info = malloc(sizeof(*info), DRM_MEM_KMS, M_WAITOK | M_ZERO); + /* okay we have an object now allocate the framebuffer */ + info = framebuffer_alloc(); + if (info == NULL) { + ret = -ENOMEM; + goto out_unref; + } ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); if (ret) { @@ -235,14 +240,16 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev, memset(rbo->kptr, 0x0, radeon_bo_size(rbo)); + drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth); + tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; info->fb_size = radeon_bo_size(rbo); info->fb_bpp = sizes->surface_bpp; - info->fb_width = sizes->surface_width; - info->fb_height = sizes->surface_height; info->fb_pbase = rdev->mc.aper_base + tmp; info->fb_vbase = (vm_offset_t)rbo->kptr; + drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); + DRM_INFO("fb mappable at 0x%" PRIXPTR "\n", info->fb_pbase); DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo)); @@ -292,15 +299,12 @@ static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfb if (rfbdev->helper.fbdev) { info = rfbdev->helper.fbdev; if (info->fb_fbd_dev != NULL) - device_delete_child(dev->device, info->fb_fbd_dev); - free(info->fb_priv, DRM_MEM_KMS); - free(info, DRM_MEM_KMS); + device_delete_child(dev->dev, info->fb_fbd_dev); + framebuffer_release(info); } if (rfb->obj) { - DRM_UNLOCK(dev); /* Work around lock recursion. dumbbell@ */ radeonfb_destroy_pinned_object(rfb->obj); - DRM_LOCK(dev); rfb->obj = NULL; } drm_fb_helper_fini(&rfbdev->helper); @@ -326,7 +330,7 @@ int radeon_fbdev_init(struct radeon_device *rdev) bpp_sel = 8; rfbdev = malloc(sizeof(struct radeon_fbdev), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!rfbdev) return -ENOMEM; @@ -359,9 +363,9 @@ void radeon_fbdev_fini(struct radeon_device *rdev) void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } int radeon_fbdev_total_size(struct radeon_device *rdev) diff --git a/sys/dev/drm2/radeon/radeon_fence.c b/sys/dev/drm2/radeon/radeon_fence.c index 3b43a8c..21c3541 100644 --- a/sys/dev/drm2/radeon/radeon_fence.c +++ b/sys/dev/drm2/radeon/radeon_fence.c @@ -35,9 +35,9 @@ __FBSDID("$FreeBSD$"); #include <dev/drm2/drmP.h> #include "radeon_reg.h" #include "radeon.h" -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP #include "radeon_trace.h" -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* * Fences @@ -106,7 +106,7 @@ int radeon_fence_emit(struct radeon_device *rdev, int ring) { /* we are protected by the ring emission mutex */ - *fence = malloc(sizeof(struct radeon_fence), DRM_MEM_DRIVER, M_WAITOK); + *fence = malloc(sizeof(struct radeon_fence), DRM_MEM_DRIVER, M_NOWAIT); if ((*fence) == NULL) { return -ENOMEM; } @@ -155,7 +155,7 @@ void radeon_fence_process(struct radeon_device *rdev, int ring) * have temporarly set the last_seq not to the true real last * seq but to an older one. */ - last_seq = atomic_load_acq_64(&rdev->fence_drv[ring].last_seq); + last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq); do { last_emitted = rdev->fence_drv[ring].sync_seq[ring]; seq = radeon_fence_read(rdev, ring); @@ -220,12 +220,12 @@ static void radeon_fence_destroy(struct radeon_fence *fence) static bool radeon_fence_seq_signaled(struct radeon_device *rdev, u64 seq, unsigned ring) { - if (atomic_load_acq_64(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { return true; } /* poll new last sequence at least once */ radeon_fence_process(rdev, ring); - if (atomic_load_acq_64(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { return true; } return false; @@ -281,7 +281,7 @@ static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq, bool signaled, fence_queue_locked; int r; - while (target_seq > atomic_load_acq_64(&rdev->fence_drv[ring].last_seq)) { + while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) { if (!rdev->ring[ring].ready) { return -EBUSY; } @@ -296,7 +296,7 @@ static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq, */ timeout = 1; } - seq = atomic_load_acq_64(&rdev->fence_drv[ring].last_seq); + seq = atomic64_read(&rdev->fence_drv[ring].last_seq); /* Save current last activity valuee, used to check for GPU lockups */ last_activity = rdev->fence_drv[ring].last_activity; @@ -352,7 +352,7 @@ static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq, #endif /* check if sequence value has changed since last_activity */ - if (seq != atomic_load_acq_64(&rdev->fence_drv[ring].last_seq)) { + if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) { continue; } @@ -641,7 +641,7 @@ int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring) { uint64_t seq; - seq = atomic_load_acq_64(&rdev->fence_drv[ring].last_seq) + 1ULL; + seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL; if (seq >= rdev->fence_drv[ring].sync_seq[ring]) { /* nothing to wait for, last_seq is already the last emited fence */ @@ -728,7 +728,7 @@ unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring) */ radeon_fence_process(rdev, ring); emitted = rdev->fence_drv[ring].sync_seq[ring] - - atomic_load_acq_64(&rdev->fence_drv[ring].last_seq); + - atomic64_read(&rdev->fence_drv[ring].last_seq); /* to avoid 32bits warp around */ if (emitted > 0x10000000) { emitted = 0x10000000; @@ -834,7 +834,7 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring) } rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index; - radeon_fence_write(rdev, atomic_load_acq_64(&rdev->fence_drv[ring].last_seq), ring); + radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring); rdev->fence_drv[ring].initialized = true; dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016jx and cpu addr 0x%p\n", ring, (uintmax_t)rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr); @@ -860,7 +860,7 @@ static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring) rdev->fence_drv[ring].gpu_addr = 0; for (i = 0; i < RADEON_NUM_RINGS; ++i) rdev->fence_drv[ring].sync_seq[i] = 0; - atomic_store_rel_64(&rdev->fence_drv[ring].last_seq, 0); + atomic64_set(&rdev->fence_drv[ring].last_seq, 0); rdev->fence_drv[ring].last_activity = jiffies; rdev->fence_drv[ring].initialized = false; } @@ -959,7 +959,7 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data) seq_printf(m, "--- ring %d ---\n", i); seq_printf(m, "Last signaled fence 0x%016llx\n", - (unsigned long long)atomic_load_acq_64(&rdev->fence_drv[i].last_seq)); + (unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq)); seq_printf(m, "Last emitted 0x%016llx\n", rdev->fence_drv[i].sync_seq[i]); diff --git a/sys/dev/drm2/radeon/radeon_gart.c b/sys/dev/drm2/radeon/radeon_gart.c index 36b4452..3dae6ae 100644 --- a/sys/dev/drm2/radeon/radeon_gart.c +++ b/sys/dev/drm2/radeon/radeon_gart.c @@ -72,13 +72,13 @@ int radeon_gart_table_ram_alloc(struct radeon_device *rdev) drm_dma_handle_t *dmah; dmah = drm_pci_alloc(rdev->ddev, rdev->gart.table_size, - PAGE_SIZE, 0xFFFFFFFFUL); + PAGE_SIZE, BUS_SPACE_MAXADDR); if (dmah == NULL) { return -ENOMEM; } rdev->gart.dmah = dmah; rdev->gart.ptr = dmah->vaddr; -#if defined(__i386) || defined(__amd64) +#ifdef CONFIG_X86 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { pmap_change_attr((vm_offset_t)rdev->gart.ptr, @@ -104,7 +104,7 @@ void radeon_gart_table_ram_free(struct radeon_device *rdev) if (rdev->gart.ptr == NULL) { return; } -#if defined(__i386) || defined(__amd64) +#ifdef CONFIG_X86 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 || rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { pmap_change_attr((vm_offset_t)rdev->gart.ptr, @@ -361,14 +361,14 @@ int radeon_gart_init(struct radeon_device *rdev) rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); /* Allocate pages table */ rdev->gart.pages = malloc(sizeof(void *) * rdev->gart.num_cpu_pages, - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->gart.pages == NULL) { radeon_gart_fini(rdev); return -ENOMEM; } rdev->gart.pages_addr = malloc(sizeof(dma_addr_t) * rdev->gart.num_cpu_pages, - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev->gart.pages_addr == NULL) { radeon_gart_fini(rdev); return -ENOMEM; @@ -648,7 +648,7 @@ retry: memset(pd_addr, 0, pd_size); pts_size = radeon_vm_num_pdes(rdev) * sizeof(struct radeon_sa_bo *); - vm->page_tables = malloc(pts_size, DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + vm->page_tables = malloc(pts_size, DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (vm->page_tables == NULL) { DRM_ERROR("Cannot allocate memory for page table array\n"); @@ -797,7 +797,7 @@ struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev, struct radeon_bo_va *bo_va; bo_va = malloc(sizeof(struct radeon_bo_va), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (bo_va == NULL) { return NULL; } @@ -916,7 +916,12 @@ uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr) result = rdev->gart.pages_addr[addr >> PAGE_SHIFT]; /* in case cpu page size != gpu page size*/ - result |= addr & (~PAGE_MASK); + /* + * FreeBSD port note: FreeBSD's PAGE_MASK is the inverse of + * Linux's one. That's why the test below doesn't inverse the + * constant. + */ + result |= addr & (PAGE_MASK); return result; } diff --git a/sys/dev/drm2/radeon/radeon_gem.c b/sys/dev/drm2/radeon/radeon_gem.c index e8975bd..2a55101 100644 --- a/sys/dev/drm2/radeon/radeon_gem.c +++ b/sys/dev/drm2/radeon/radeon_gem.c @@ -46,10 +46,10 @@ void radeon_gem_object_free(struct drm_gem_object *gobj) struct radeon_bo *robj = gem_to_radeon_bo(gobj); if (robj) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (robj->gem_base.import_attach) drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ radeon_bo_unref(&robj); } } @@ -80,7 +80,7 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size, retry: r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj); if (r) { - if (r != -ERESTART) { + if (r != -ERESTARTSYS) { if (initial_domain == RADEON_GEM_DOMAIN_VRAM) { initial_domain |= RADEON_GEM_DOMAIN_GTT; goto retry; @@ -268,11 +268,12 @@ int radeon_gem_create_ioctl(struct drm_device *dev, void *data, args->initial_domain, false, false, &gobj); if (r) { + if (r == -ERESTARTSYS) + r = -EINTR; sx_sunlock(&rdev->exclusive_lock); r = radeon_gem_handle_lockup(rdev, r); return r; } - handle = 0; r = drm_gem_handle_create(filp, gobj, &handle); /* drop reference from allocate - handle holds it now */ drm_gem_object_unreference_unlocked(gobj); @@ -394,6 +395,8 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, if (rdev->asic->ioctl_wait_idle) robj->rdev->asic->ioctl_wait_idle(rdev, robj); drm_gem_object_unreference_unlocked(gobj); + if (r == -ERESTARTSYS) + r = -EINTR; r = radeon_gem_handle_lockup(rdev, r); return r; } @@ -467,7 +470,7 @@ int radeon_gem_va_ioctl(struct drm_device *dev, void *data, } if (args->offset < RADEON_VA_RESERVED_SIZE) { - dev_err(dev->device, + dev_err(dev->dev, "offset 0x%lX is in reserved area 0x%X\n", (unsigned long)args->offset, RADEON_VA_RESERVED_SIZE); @@ -481,13 +484,13 @@ int radeon_gem_va_ioctl(struct drm_device *dev, void *data, */ invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM; if ((args->flags & invalid_flags)) { - dev_err(dev->device, "invalid flags 0x%08X vs 0x%08X\n", + dev_err(dev->dev, "invalid flags 0x%08X vs 0x%08X\n", args->flags, invalid_flags); args->operation = RADEON_VA_RESULT_ERROR; return -EINVAL; } if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) { - dev_err(dev->device, "only supported snooped mapping for now\n"); + dev_err(dev->dev, "only supported snooped mapping for now\n"); args->operation = RADEON_VA_RESULT_ERROR; return -EINVAL; } @@ -497,7 +500,7 @@ int radeon_gem_va_ioctl(struct drm_device *dev, void *data, case RADEON_VA_UNMAP: break; default: - dev_err(dev->device, "unsupported operation %d\n", + dev_err(dev->dev, "unsupported operation %d\n", args->operation); args->operation = RADEON_VA_RESULT_ERROR; return -EINVAL; @@ -567,7 +570,6 @@ int radeon_mode_dumb_create(struct drm_file *file_priv, if (r) return -ENOMEM; - handle = 0; r = drm_gem_handle_create(file_priv, gobj, &handle); /* drop reference from allocate - handle holds it now */ drm_gem_object_unreference_unlocked(gobj); diff --git a/sys/dev/drm2/radeon/radeon_i2c.c b/sys/dev/drm2/radeon/radeon_i2c.c index 917286a..8a8a904 100644 --- a/sys/dev/drm2/radeon/radeon_i2c.c +++ b/sys/dev/drm2/radeon/radeon_i2c.c @@ -449,7 +449,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, break; default: DRM_ERROR("gpio not supported with hw i2c\n"); - ret = EINVAL; + ret = -EINVAL; goto done; } break; @@ -464,7 +464,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, break; default: DRM_ERROR("gpio not supported with hw i2c\n"); - ret = EINVAL; + ret = -EINVAL; goto done; } break; @@ -483,7 +483,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, break; default: DRM_ERROR("gpio not supported with hw i2c\n"); - ret = EINVAL; + ret = -EINVAL; goto done; } break; @@ -499,7 +499,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, break; default: DRM_ERROR("gpio not supported with hw i2c\n"); - ret = EINVAL; + ret = -EINVAL; goto done; } break; @@ -523,13 +523,13 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, break; default: DRM_ERROR("gpio not supported with hw i2c\n"); - ret = EINVAL; + ret = -EINVAL; goto done; } break; default: DRM_ERROR("unsupported asic\n"); - ret = EINVAL; + ret = -EINVAL; goto done; break; } @@ -550,7 +550,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, (48 << RADEON_I2C_TIME_LIMIT_SHIFT))); WREG32(i2c_cntl_0, reg); for (k = 0; k < 32; k++) { - DRM_UDELAY(10); + udelay(10); tmp = RREG32(i2c_cntl_0); if (tmp & RADEON_I2C_GO) continue; @@ -560,7 +560,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, else { DRM_DEBUG("i2c write error 0x%08x\n", tmp); WREG32(i2c_cntl_0, tmp | RADEON_I2C_ABORT); - ret = EIO; + ret = -EIO; goto done; } } @@ -582,7 +582,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, (48 << RADEON_I2C_TIME_LIMIT_SHIFT))); WREG32(i2c_cntl_0, reg | RADEON_I2C_RECEIVE); for (k = 0; k < 32; k++) { - DRM_UDELAY(10); + udelay(10); tmp = RREG32(i2c_cntl_0); if (tmp & RADEON_I2C_GO) continue; @@ -592,7 +592,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, else { DRM_DEBUG("i2c read error 0x%08x\n", tmp); WREG32(i2c_cntl_0, tmp | RADEON_I2C_ABORT); - ret = EIO; + ret = -EIO; goto done; } } @@ -610,7 +610,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, (48 << RADEON_I2C_TIME_LIMIT_SHIFT))); WREG32(i2c_cntl_0, reg); for (k = 0; k < 32; k++) { - DRM_UDELAY(10); + udelay(10); tmp = RREG32(i2c_cntl_0); if (tmp & RADEON_I2C_GO) continue; @@ -620,7 +620,7 @@ static int r100_hw_i2c_xfer(struct radeon_i2c_chan *i2c, else { DRM_DEBUG("i2c write error 0x%08x\n", tmp); WREG32(i2c_cntl_0, tmp | RADEON_I2C_ABORT); - ret = EIO; + ret = -EIO; goto done; } } @@ -710,13 +710,13 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, WREG32(AVIVO_DC_I2C_ARBITRATION, AVIVO_DC_I2C_SW_WANTS_TO_USE_I2C); for (i = 0; i < 50; i++) { - DRM_UDELAY(1); + udelay(1); if (RREG32(AVIVO_DC_I2C_ARBITRATION) & AVIVO_DC_I2C_SW_CAN_USE_I2C) break; } if (i == 50) { DRM_ERROR("failed to get i2c bus\n"); - ret = EBUSY; + ret = -EBUSY; goto done; } @@ -733,7 +733,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, break; default: DRM_ERROR("gpio not supported with hw i2c\n"); - ret = EINVAL; + ret = -EINVAL; goto done; } @@ -744,7 +744,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, AVIVO_DC_I2C_NACK | AVIVO_DC_I2C_HALT)); WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET); - DRM_UDELAY(1); + udelay(1); WREG32(AVIVO_DC_I2C_RESET, 0); WREG32(AVIVO_DC_I2C_DATA, (p->slave << 1) & 0xff); @@ -757,7 +757,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, WREG32(AVIVO_DC_I2C_CONTROL1, reg); WREG32(AVIVO_DC_I2C_STATUS1, AVIVO_DC_I2C_GO); for (j = 0; j < 200; j++) { - DRM_UDELAY(50); + udelay(50); tmp = RREG32(AVIVO_DC_I2C_STATUS1); if (tmp & AVIVO_DC_I2C_GO) continue; @@ -767,7 +767,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, else { DRM_DEBUG("i2c write error 0x%08x\n", tmp); WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_ABORT); - ret = EIO; + ret = -EIO; goto done; } } @@ -788,7 +788,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, AVIVO_DC_I2C_NACK | AVIVO_DC_I2C_HALT)); WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET); - DRM_UDELAY(1); + udelay(1); WREG32(AVIVO_DC_I2C_RESET, 0); WREG32(AVIVO_DC_I2C_DATA, ((p->slave << 1) & 0xff) | 0x1); @@ -799,7 +799,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, WREG32(AVIVO_DC_I2C_CONTROL1, reg | AVIVO_DC_I2C_RECEIVE); WREG32(AVIVO_DC_I2C_STATUS1, AVIVO_DC_I2C_GO); for (j = 0; j < 200; j++) { - DRM_UDELAY(50); + udelay(50); tmp = RREG32(AVIVO_DC_I2C_STATUS1); if (tmp & AVIVO_DC_I2C_GO) continue; @@ -809,7 +809,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, else { DRM_DEBUG("i2c read error 0x%08x\n", tmp); WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_ABORT); - ret = EIO; + ret = -EIO; goto done; } } @@ -828,7 +828,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, AVIVO_DC_I2C_NACK | AVIVO_DC_I2C_HALT)); WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET); - DRM_UDELAY(1); + udelay(1); WREG32(AVIVO_DC_I2C_RESET, 0); WREG32(AVIVO_DC_I2C_DATA, (p->slave << 1) & 0xff); @@ -842,7 +842,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, WREG32(AVIVO_DC_I2C_CONTROL1, reg); WREG32(AVIVO_DC_I2C_STATUS1, AVIVO_DC_I2C_GO); for (j = 0; j < 200; j++) { - DRM_UDELAY(50); + udelay(50); tmp = RREG32(AVIVO_DC_I2C_STATUS1); if (tmp & AVIVO_DC_I2C_GO) continue; @@ -852,7 +852,7 @@ static int r500_hw_i2c_xfer(struct radeon_i2c_chan *i2c, else { DRM_DEBUG("i2c write error 0x%08x\n", tmp); WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_ABORT); - ret = EIO; + ret = -EIO; goto done; } } @@ -867,7 +867,7 @@ done: AVIVO_DC_I2C_NACK | AVIVO_DC_I2C_HALT)); WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET); - DRM_UDELAY(1); + udelay(1); WREG32(AVIVO_DC_I2C_RESET, 0); WREG32(AVIVO_DC_I2C_ARBITRATION, AVIVO_DC_I2C_SW_DONE_USING_I2C); @@ -953,11 +953,11 @@ static int radeon_hw_i2c_xfer(device_t dev, break; default: DRM_ERROR("i2c: unhandled radeon chip\n"); - ret = EIO; + ret = -EIO; break; } - return ret; + return -ret; } static int @@ -1043,7 +1043,7 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, return NULL; i2c = malloc(sizeof(struct radeon_i2c_chan), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (i2c == NULL) return NULL; @@ -1063,7 +1063,7 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, /* set the radeon hw i2c adapter */ snprintf(i2c->name, sizeof(i2c->name), "Radeon i2c hw bus %s", name); - iicbus_dev = device_add_child(dev->device, "radeon_hw_i2c", -1); + iicbus_dev = device_add_child(dev->dev, "radeon_hw_i2c", -1); if (iicbus_dev == NULL) { DRM_ERROR("Failed to create bridge for hw i2c %s\n", name); @@ -1076,14 +1076,14 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, if (ret != 0) { DRM_ERROR("Attach failed for bridge for hw i2c %s\n", name); - device_delete_child(dev->device, iicbus_dev); + device_delete_child(dev->dev, iicbus_dev); goto out_free; } i2c->adapter = device_find_child(iicbus_dev, "iicbus", -1); if (i2c->adapter == NULL) { DRM_ERROR("hw i2c bridge doesn't have iicbus child\n"); - device_delete_child(dev->device, iicbus_dev); + device_delete_child(dev->dev, iicbus_dev); goto out_free; } } else if (rec->hw_capable && @@ -1092,7 +1092,7 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, /* hw i2c using atom */ snprintf(i2c->name, sizeof(i2c->name), "Radeon i2c hw bus %s", name); - iicbus_dev = device_add_child(dev->device, "radeon_atom_hw_i2c", -1); + iicbus_dev = device_add_child(dev->dev, "radeon_atom_hw_i2c", -1); if (iicbus_dev == NULL) { DRM_ERROR("Failed to create bridge for hw i2c %s\n", name); @@ -1105,14 +1105,14 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, if (ret != 0) { DRM_ERROR("Attach failed for bridge for hw i2c %s\n", name); - device_delete_child(dev->device, iicbus_dev); + device_delete_child(dev->dev, iicbus_dev); goto out_free; } i2c->adapter = device_find_child(iicbus_dev, "iicbus", -1); if (i2c->adapter == NULL) { DRM_ERROR("hw i2c bridge doesn't have iicbus child\n"); - device_delete_child(dev->device, iicbus_dev); + device_delete_child(dev->dev, iicbus_dev); goto out_free; } } else { @@ -1121,7 +1121,7 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, /* set the radeon bit adapter */ snprintf(i2c->name, sizeof(i2c->name), "Radeon i2c bit bus %s", name); - iicbus_dev = device_add_child(dev->device, "radeon_iicbb", -1); + iicbus_dev = device_add_child(dev->dev, "radeon_iicbb", -1); if (iicbus_dev == NULL) { DRM_ERROR("Failed to create bridge for bb i2c %s\n", name); @@ -1134,14 +1134,14 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, if (ret != 0) { DRM_ERROR("Attach failed for bridge for bb i2c %s\n", name); - device_delete_child(dev->device, iicbus_dev); + device_delete_child(dev->dev, iicbus_dev); goto out_free; } iicbb_dev = device_find_child(iicbus_dev, "iicbb", -1); if (iicbb_dev == NULL) { DRM_ERROR("bb i2c bridge doesn't have iicbb child\n"); - device_delete_child(dev->device, iicbus_dev); + device_delete_child(dev->dev, iicbus_dev); goto out_free; } @@ -1149,7 +1149,7 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, if (i2c->adapter == NULL) { DRM_ERROR( "bbbus bridge doesn't have iicbus grandchild\n"); - device_delete_child(dev->device, iicbus_dev); + device_delete_child(dev->dev, iicbus_dev); goto out_free; } } @@ -1174,7 +1174,7 @@ struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, int ret; i2c = malloc(sizeof(struct radeon_i2c_chan), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (i2c == NULL) return NULL; @@ -1182,7 +1182,7 @@ struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, i2c->dev = dev; snprintf(i2c->name, sizeof(i2c->name), "Radeon aux bus %s", name); - ret = iic_dp_aux_add_bus(dev->device, i2c->name, + ret = iic_dp_aux_add_bus(dev->dev, i2c->name, radeon_dp_i2c_aux_ch, i2c, &i2c->iic_bus, &i2c->adapter); if (ret) { @@ -1205,7 +1205,7 @@ void radeon_i2c_destroy(struct radeon_i2c_chan *i2c) int ret; mtx_lock(&Giant); - ret = device_delete_child(i2c->dev->device, i2c->iic_bus); + ret = device_delete_child(i2c->dev->dev, i2c->iic_bus); mtx_unlock(&Giant); KASSERT(ret == 0, ("unable to detach iic bus %s: %d", i2c->name, ret)); diff --git a/sys/dev/drm2/radeon/radeon_ioc32.c b/sys/dev/drm2/radeon/radeon_ioc32.c index ee691be..89ec8d7 100644 --- a/sys/dev/drm2/radeon/radeon_ioc32.c +++ b/sys/dev/drm2/radeon/radeon_ioc32.c @@ -291,6 +291,7 @@ static int compat_radeon_irq_emit(struct drm_device *dev, void *arg, } /* The two 64-bit arches where alignof(u64)==4 in 32-bit code */ +#if defined (CONFIG_X86_64) || defined(CONFIG_IA64) typedef struct drm_radeon_setparam32 { int param; u64 value; @@ -309,6 +310,9 @@ static int compat_radeon_cp_setparam(struct drm_device *dev, void *arg, return radeon_ioctls[DRM_IOCTL_RADEON_SETPARAM].func(dev, &request, file_priv); } +#else +#define compat_radeon_cp_setparam NULL +#endif /* X86_64 || IA64 */ struct drm_ioctl_desc radeon_compat_ioctls[] = { DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, compat_radeon_cp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), @@ -322,6 +326,6 @@ struct drm_ioctl_desc radeon_compat_ioctls[] = { DRM_IOCTL_DEF(DRM_RADEON_ALLOC, compat_radeon_mem_alloc, DRM_AUTH), DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, compat_radeon_irq_emit, DRM_AUTH) }; -int radeon_num_compat_ioctls = DRM_ARRAY_SIZE(radeon_compat_ioctls); +int radeon_num_compat_ioctls = ARRAY_SIZE(radeon_compat_ioctls); #endif diff --git a/sys/dev/drm2/radeon/radeon_irq_kms.c b/sys/dev/drm2/radeon/radeon_irq_kms.c index a679ed1..280322f 100644 --- a/sys/dev/drm2/radeon/radeon_irq_kms.c +++ b/sys/dev/drm2/radeon/radeon_irq_kms.c @@ -171,18 +171,14 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev) * Returns true if MSIs should be enabled, false if MSIs * should not be enabled. */ -int radeon_msi_ok(struct drm_device *dev, unsigned long flags) +static bool radeon_msi_ok(struct radeon_device *rdev) { - int family; - - family = flags & RADEON_FAMILY_MASK; - /* RV370/RV380 was first asic with MSI support */ - if (family < CHIP_RV380) + if (rdev->family < CHIP_RV380) return false; /* MSIs don't work on AGP */ - if (drm_device_is_agp(dev)) + if (rdev->flags & RADEON_IS_AGP) return false; /* force MSI on */ @@ -193,42 +189,42 @@ int radeon_msi_ok(struct drm_device *dev, unsigned long flags) /* Quirks */ /* HP RS690 only seems to work with MSIs. */ - if ((dev->pci_device == 0x791f) && - (dev->pci_subvendor == 0x103c) && - (dev->pci_subdevice == 0x30c2)) + if ((rdev->ddev->pci_device == 0x791f) && + (rdev->ddev->pci_subvendor == 0x103c) && + (rdev->ddev->pci_subdevice == 0x30c2)) return true; /* Dell RS690 only seems to work with MSIs. */ - if ((dev->pci_device == 0x791f) && - (dev->pci_subvendor == 0x1028) && - (dev->pci_subdevice == 0x01fc)) + if ((rdev->ddev->pci_device == 0x791f) && + (rdev->ddev->pci_subvendor == 0x1028) && + (rdev->ddev->pci_subdevice == 0x01fc)) return true; /* Dell RS690 only seems to work with MSIs. */ - if ((dev->pci_device == 0x791f) && - (dev->pci_subvendor == 0x1028) && - (dev->pci_subdevice == 0x01fd)) + if ((rdev->ddev->pci_device == 0x791f) && + (rdev->ddev->pci_subvendor == 0x1028) && + (rdev->ddev->pci_subdevice == 0x01fd)) return true; /* Gateway RS690 only seems to work with MSIs. */ - if ((dev->pci_device == 0x791f) && - (dev->pci_subvendor == 0x107b) && - (dev->pci_subdevice == 0x0185)) + if ((rdev->ddev->pci_device == 0x791f) && + (rdev->ddev->pci_subvendor == 0x107b) && + (rdev->ddev->pci_subdevice == 0x0185)) return true; /* try and enable MSIs by default on all RS690s */ - if (family == CHIP_RS690) + if (rdev->family == CHIP_RS690) return true; /* RV515 seems to have MSI issues where it loses * MSI rearms occasionally. This leads to lockups and freezes. * disable it by default. */ - if (family == CHIP_RV515) + if (rdev->family == CHIP_RV515) return false; - if (flags & RADEON_IS_IGP) { + if (rdev->flags & RADEON_IS_IGP) { /* APUs work fine with MSIs */ - if (family >= CHIP_PALM) + if (rdev->family >= CHIP_PALM) return true; /* lots of IGPs have problems with MSIs */ return false; @@ -258,12 +254,17 @@ int radeon_irq_kms_init(struct radeon_device *rdev) return r; } /* enable msi */ - rdev->msi_enabled = rdev->ddev->msi_enabled; - + rdev->msi_enabled = 0; + + if (radeon_msi_ok(rdev)) { + int ret = drm_pci_enable_msi(rdev->ddev); + if (!ret) { + rdev->msi_enabled = 1; + dev_info(rdev->dev, "radeon: using MSI.\n"); + } + } rdev->irq.installed = true; - DRM_UNLOCK(rdev->ddev); r = drm_irq_install(rdev->ddev); - DRM_LOCK(rdev->ddev); if (r) { rdev->irq.installed = false; return r; @@ -285,6 +286,8 @@ void radeon_irq_kms_fini(struct radeon_device *rdev) if (rdev->irq.installed) { drm_irq_uninstall(rdev->ddev); rdev->irq.installed = false; + if (rdev->msi_enabled) + drm_pci_disable_msi(rdev->ddev); } taskqueue_drain(rdev->tq, &rdev->hotplug_work); } @@ -401,6 +404,9 @@ void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block) { unsigned long irqflags; + if (!rdev->ddev->irq_enabled) + return; + DRM_SPINLOCK_IRQSAVE(&rdev->irq.lock, irqflags); rdev->irq.afmt[block] = true; radeon_irq_set(rdev); @@ -420,6 +426,9 @@ void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block) { unsigned long irqflags; + if (!rdev->ddev->irq_enabled) + return; + DRM_SPINLOCK_IRQSAVE(&rdev->irq.lock, irqflags); rdev->irq.afmt[block] = false; radeon_irq_set(rdev); @@ -439,6 +448,9 @@ void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask) unsigned long irqflags; int i; + if (!rdev->ddev->irq_enabled) + return; + DRM_SPINLOCK_IRQSAVE(&rdev->irq.lock, irqflags); for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); @@ -459,6 +471,9 @@ void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) unsigned long irqflags; int i; + if (!rdev->ddev->irq_enabled) + return; + DRM_SPINLOCK_IRQSAVE(&rdev->irq.lock, irqflags); for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); diff --git a/sys/dev/drm2/radeon/radeon_irq_kms.h b/sys/dev/drm2/radeon/radeon_irq_kms.h index 6bfb988..431bdaa 100644 --- a/sys/dev/drm2/radeon/radeon_irq_kms.h +++ b/sys/dev/drm2/radeon/radeon_irq_kms.h @@ -10,6 +10,4 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev); int radeon_driver_irq_postinstall_kms(struct drm_device *dev); void radeon_driver_irq_uninstall_kms(struct drm_device *dev); -int radeon_msi_ok(struct drm_device *dev, unsigned long flags); - #endif /* !defined(__RADEON_IRQ_KMS_H__) */ diff --git a/sys/dev/drm2/radeon/radeon_kms.c b/sys/dev/drm2/radeon/radeon_kms.c index 8507d01..29e19df 100644 --- a/sys/dev/drm2/radeon/radeon_kms.c +++ b/sys/dev/drm2/radeon/radeon_kms.c @@ -52,9 +52,13 @@ int radeon_driver_unload_kms(struct drm_device *dev) if (rdev == NULL) return 0; + if (rdev->rmmio == NULL) + goto done_free; radeon_acpi_fini(rdev); radeon_modeset_fini(rdev); radeon_device_fini(rdev); + +done_free: free(rdev, DRM_MEM_DRIVER); dev->dev_private = NULL; return 0; @@ -78,17 +82,17 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) struct radeon_device *rdev; int r, acpi_status; - rdev = malloc(sizeof(struct radeon_device), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + rdev = malloc(sizeof(struct radeon_device), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (rdev == NULL) { return -ENOMEM; } dev->dev_private = (void *)rdev; /* update BUS flag */ - if (drm_device_is_agp(dev)) { + if (drm_pci_device_is_agp(dev)) { DRM_INFO("RADEON_IS_AGP\n"); flags |= RADEON_IS_AGP; - } else if (drm_device_is_pcie(dev)) { + } else if (drm_pci_device_is_pcie(dev)) { DRM_INFO("RADEON_IS_PCIE\n"); flags |= RADEON_IS_PCIE; } else { @@ -104,7 +108,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) */ r = radeon_device_init(rdev, dev, flags); if (r) { - dev_err(dev->device, "Fatal error during GPU init\n"); + dev_err(dev->dev, "Fatal error during GPU init\n"); goto out; } @@ -114,7 +118,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) */ r = radeon_modeset_init(rdev); if (r) - dev_err(dev->device, "Fatal error during modeset init\n"); + dev_err(dev->dev, "Fatal error during modeset init\n"); /* Call ACPI methods: require modeset init * but failure is not fatal @@ -122,7 +126,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) if (!r) { acpi_status = radeon_acpi_init(rdev); if (acpi_status) - dev_dbg(dev->device, + dev_dbg(dev->dev, "Error during ACPI methods call\n"); } @@ -419,9 +423,9 @@ int radeon_driver_firstopen_kms(struct drm_device *dev) */ void radeon_driver_lastclose_kms(struct drm_device *dev) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP vga_switcheroo_process_delayed_switch(); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } /** @@ -445,7 +449,7 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) struct radeon_bo_va *bo_va; int r; - fpriv = malloc(sizeof(*fpriv), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + fpriv = malloc(sizeof(*fpriv), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (unlikely(!fpriv)) { return -ENOMEM; } @@ -724,4 +728,4 @@ struct drm_ioctl_desc radeon_ioctls_kms[] = { DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), DRM_IOCTL_DEF_DRV(RADEON_GEM_VA, radeon_gem_va_ioctl, DRM_AUTH|DRM_UNLOCKED), }; -int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms); +int radeon_max_kms_ioctl = ARRAY_SIZE(radeon_ioctls_kms); diff --git a/sys/dev/drm2/radeon/radeon_legacy_crtc.c b/sys/dev/drm2/radeon/radeon_legacy_crtc.c index 54f755a..282f200 100644 --- a/sys/dev/drm2/radeon/radeon_legacy_crtc.c +++ b/sys/dev/drm2/radeon/radeon_legacy_crtc.c @@ -883,7 +883,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) (unsigned)((pll_fb_post_div & RADEON_P2PLL_POST0_DIV_MASK) >> 16)); - DRM_MDELAY(50); /* Let the clock to lock */ + mdelay(50); /* Let the clock to lock */ WREG32_PLL_P(RADEON_PIXCLKS_CNTL, RADEON_PIX2CLK_SRC_SEL_P2PLLCLK, @@ -988,7 +988,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) pll_fb_post_div & RADEON_PPLL_FB3_DIV_MASK, (pll_fb_post_div & RADEON_PPLL_POST3_DIV_MASK) >> 16); - DRM_MDELAY(50); /* Let the clock to lock */ + mdelay(50); /* Let the clock to lock */ WREG32_PLL_P(RADEON_VCLK_ECP_CNTL, RADEON_VCLK_SRC_SEL_PPLLCLK, diff --git a/sys/dev/drm2/radeon/radeon_legacy_encoders.c b/sys/dev/drm2/radeon/radeon_legacy_encoders.c index a4e6e28..d0db92f 100644 --- a/sys/dev/drm2/radeon/radeon_legacy_encoders.c +++ b/sys/dev/drm2/radeon/radeon_legacy_encoders.c @@ -89,7 +89,7 @@ static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode) lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); lvds_pll_cntl |= RADEON_LVDS_PLL_EN; WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); - DRM_MDELAY(1); + mdelay(1); lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET; @@ -102,7 +102,7 @@ static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode) (backlight_level << RADEON_LVDS_BL_MOD_LEVEL_SHIFT)); if (is_mac) lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; - DRM_MDELAY(panel_pwr_delay); + mdelay(panel_pwr_delay); WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); break; case DRM_MODE_DPMS_STANDBY: @@ -119,10 +119,10 @@ static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode) WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); } - DRM_MDELAY(panel_pwr_delay); + mdelay(panel_pwr_delay); WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); - DRM_MDELAY(panel_pwr_delay); + mdelay(panel_pwr_delay); break; } @@ -245,7 +245,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder, } static bool radeon_legacy_mode_fixup(struct drm_encoder *encoder, - struct drm_display_mode *mode, + const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); @@ -383,7 +383,7 @@ void radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, #endif pdata = malloc(sizeof(struct radeon_backlight_privdata), - DRM_MEM_DRIVER, M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT); if (!pdata) { DRM_ERROR("Memory allocation failed\n"); goto error; @@ -693,7 +693,7 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc WREG32(RADEON_DAC_MACRO_CNTL, tmp); - DRM_MDELAY(2); + mdelay(2); if (RREG32(RADEON_DAC_CNTL) & RADEON_DAC_CMP_OUTPUT) found = connector_status_connected; @@ -1338,7 +1338,7 @@ static bool r300_legacy_tv_detect(struct drm_encoder *encoder, (6 << RADEON_TV_DAC_DACADJ_SHIFT)); RREG32(RADEON_TV_DAC_CNTL); - DRM_MDELAY(4); + mdelay(4); WREG32(RADEON_TV_DAC_CNTL, RADEON_TV_DAC_NBLANK | @@ -1349,7 +1349,7 @@ static bool r300_legacy_tv_detect(struct drm_encoder *encoder, (6 << RADEON_TV_DAC_DACADJ_SHIFT)); RREG32(RADEON_TV_DAC_CNTL); - DRM_MDELAY(6); + mdelay(6); tmp = RREG32(RADEON_TV_DAC_CNTL); if ((tmp & RADEON_TV_DAC_GDACDET) != 0) { @@ -1416,7 +1416,7 @@ static bool radeon_legacy_tv_detect(struct drm_encoder *encoder, (0x109 << RADEON_TV_FORCE_DAC_DATA_SHIFT); WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tmp); - DRM_MDELAY(3); + mdelay(3); tmp = RREG32(RADEON_TV_DAC_CNTL); if (tmp & RADEON_TV_DAC_GDACDET) { found = true; @@ -1498,9 +1498,8 @@ static bool radeon_legacy_ext_dac_detect(struct drm_encoder *encoder, if (found) break; - DRM_MDELAY(1); if (!drm_can_sleep()) - DRM_MDELAY(1); + mdelay(1); else DRM_MSLEEP(1); } @@ -1642,7 +1641,7 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder tmp = dac_cntl2 | RADEON_DAC2_DAC2_CLK_SEL | RADEON_DAC2_CMP_EN; WREG32(RADEON_DAC_CNTL2, tmp); - DRM_MDELAY(10); + mdelay(10); if (ASIC_IS_R300(rdev)) { if (RREG32(RADEON_DAC_CNTL2) & RADEON_DAC2_CMP_OUT_B) @@ -1699,7 +1698,7 @@ static struct radeon_encoder_int_tmds *radeon_legacy_get_tmds_info(struct radeon bool ret; tmds = malloc(sizeof(struct radeon_encoder_int_tmds), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!tmds) return NULL; @@ -1726,7 +1725,7 @@ static struct radeon_encoder_ext_tmds *radeon_legacy_get_ext_tmds_info(struct ra return NULL; tmds = malloc(sizeof(struct radeon_encoder_ext_tmds), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!tmds) return NULL; @@ -1758,7 +1757,7 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_ /* add a new one */ radeon_encoder = malloc(sizeof(struct radeon_encoder), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!radeon_encoder) return; diff --git a/sys/dev/drm2/radeon/radeon_legacy_tv.c b/sys/dev/drm2/radeon/radeon_legacy_tv.c index 5311a48..c124a74 100644 --- a/sys/dev/drm2/radeon/radeon_legacy_tv.c +++ b/sys/dev/drm2/radeon/radeon_legacy_tv.c @@ -232,7 +232,7 @@ static const struct radeon_tv_mode_constants available_tv_modes[] = { }, }; -#define N_AVAILABLE_MODES DRM_ARRAY_SIZE(available_tv_modes) +#define N_AVAILABLE_MODES ARRAY_SIZE(available_tv_modes) static const struct radeon_tv_mode_constants *radeon_legacy_tv_get_std_mode(struct radeon_encoder *radeon_encoder, uint16_t *pll_ref_freq) @@ -647,7 +647,7 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, if (flicker_removal < 3) flicker_removal = 3; - for (i = 0; i < DRM_ARRAY_SIZE(SLOPE_limit); ++i) { + for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) { if (flicker_removal == SLOPE_limit[i]) break; } diff --git a/sys/dev/drm2/radeon/radeon_mem.c b/sys/dev/drm2/radeon/radeon_mem.c index 9ff8791..b14c0ce 100644 --- a/sys/dev/drm2/radeon/radeon_mem.c +++ b/sys/dev/drm2/radeon/radeon_mem.c @@ -46,7 +46,7 @@ static struct mem_block *split_block(struct mem_block *p, int start, int size, /* Maybe cut off the start of an existing block */ if (start > p->start) { struct mem_block *newblock = malloc(sizeof(*newblock), - DRM_MEM_DRIVER, M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT); if (!newblock) goto out; newblock->start = start; @@ -63,7 +63,7 @@ static struct mem_block *split_block(struct mem_block *p, int start, int size, /* Maybe cut off the end of an existing block */ if (size < p->size) { struct mem_block *newblock = malloc(sizeof(*newblock), - DRM_MEM_DRIVER, M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT); if (!newblock) goto out; newblock->start = start + size; @@ -137,12 +137,12 @@ static void free_block(struct mem_block *p) static int init_heap(struct mem_block **heap, int start, int size) { struct mem_block *blocks = malloc(sizeof(*blocks), - DRM_MEM_DRIVER, M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT); if (!blocks) return -ENOMEM; - *heap = malloc(sizeof(**heap), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + *heap = malloc(sizeof(**heap), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!*heap) { free(blocks, DRM_MEM_DRIVER); return -ENOMEM; diff --git a/sys/dev/drm2/radeon/radeon_object.c b/sys/dev/drm2/radeon/radeon_object.c index 30d3d81..eadfe74 100644 --- a/sys/dev/drm2/radeon/radeon_object.c +++ b/sys/dev/drm2/radeon/radeon_object.c @@ -36,11 +36,15 @@ __FBSDID("$FreeBSD$"); #include <dev/drm2/drmP.h> #include <dev/drm2/radeon/radeon_drm.h> #include "radeon.h" -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP #include "radeon_trace.h" -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +int radeon_ttm_init(struct radeon_device *rdev); +void radeon_ttm_fini(struct radeon_device *rdev); +#endif static void radeon_bo_clear_surface_reg(struct radeon_bo *bo); /* @@ -135,7 +139,7 @@ int radeon_bo_create(struct radeon_device *rdev, sizeof(struct radeon_bo)); bo = malloc(sizeof(struct radeon_bo), - DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (bo == NULL) return -ENOMEM; r = drm_gem_object_init(rdev->ddev, &bo->gem_base, size); @@ -160,9 +164,9 @@ int radeon_bo_create(struct radeon_device *rdev, } *bo_ptr = bo; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP trace_radeon_bo_create(bo); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ return 0; } @@ -315,6 +319,7 @@ void radeon_bo_force_delete(struct radeon_device *rdev) } dev_err(rdev->dev, "Userspace still has active objects !\n"); list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { + DRM_LOCK(rdev->ddev); dev_err(rdev->dev, "%p %p %lu %lu force free\n", &bo->gem_base, bo, (unsigned long)bo->gem_base.size, *((unsigned long *)&bo->gem_base.refcount)); @@ -323,6 +328,7 @@ void radeon_bo_force_delete(struct radeon_device *rdev) sx_xunlock(&bo->rdev->gem.mutex); /* this should unref the ttm bo */ drm_gem_object_unreference(&bo->gem_base); + DRM_UNLOCK(rdev->ddev); } } @@ -388,13 +394,13 @@ int radeon_bo_list_validate(struct list_head *head) return 0; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP int radeon_bo_fbdev_mmap(struct radeon_bo *bo, struct vm_area_struct *vma) { return ttm_fbdev_mmap(vma, &bo->tbo); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ int radeon_bo_get_surface_reg(struct radeon_bo *bo) { diff --git a/sys/dev/drm2/radeon/radeon_object.h b/sys/dev/drm2/radeon/radeon_object.h index efb7149..c115514 100644 --- a/sys/dev/drm2/radeon/radeon_object.h +++ b/sys/dev/drm2/radeon/radeon_object.h @@ -139,10 +139,10 @@ extern void radeon_bo_fini(struct radeon_device *rdev); extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj, struct list_head *head); extern int radeon_bo_list_validate(struct list_head *head); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo, struct vm_area_struct *vma); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo, u32 tiling_flags, u32 pitch); extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo, diff --git a/sys/dev/drm2/radeon/radeon_pm.c b/sys/dev/drm2/radeon/radeon_pm.c index 0caa1b7..18d8003 100644 --- a/sys/dev/drm2/radeon/radeon_pm.c +++ b/sys/dev/drm2/radeon/radeon_pm.c @@ -41,9 +41,9 @@ static const char *radeon_pm_state_type_name[5] = { "Performance", }; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static void radeon_dynpm_idle_work_handler(struct work_struct *work); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ static int radeon_debugfs_pm_init(struct radeon_device *rdev); static bool radeon_pm_in_vbl(struct radeon_device *rdev); static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish); @@ -87,7 +87,7 @@ static void radeon_pm_update_profile(struct radeon_device *rdev) rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; break; case PM_PROFILE_AUTO: -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (power_supply_is_system_supplied() > 0) { if (rdev->pm.active_crtc_count > 1) rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; @@ -99,7 +99,7 @@ static void radeon_pm_update_profile(struct radeon_device *rdev) else rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ break; case PM_PROFILE_LOW: if (rdev->pm.active_crtc_count > 1) @@ -151,11 +151,11 @@ static void radeon_sync_with_vblank(struct radeon_device *rdev) { if (rdev->pm.active_crtcs) { rdev->pm.vblank_sync = false; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP wait_event_timeout( rdev->irq.vblank_queue, rdev->pm.vblank_sync, msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT)); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } } @@ -176,7 +176,7 @@ static void radeon_set_power_state(struct radeon_device *rdev) /* starting with BTC, there is one state that is used for both * MH and SH. Difference is that we always use the high clock index for - * mclk. + * mclk and vddci. */ if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && (rdev->family >= CHIP_BARTS) && @@ -248,7 +248,7 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev) (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) return; - //DRM_LOCK(rdev->ddev); XXX Recursion, already locked in drm_attach/drm_load -- dumbbell@ + DRM_LOCK(rdev->ddev); sx_xlock(&rdev->pm.mclk_lock); sx_xlock(&rdev->ring_lock); @@ -263,7 +263,7 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev) /* needs a GPU reset dont reset here */ sx_xunlock(&rdev->ring_lock); sx_xunlock(&rdev->pm.mclk_lock); - //DRM_UNLOCK(rdev->ddev); XXX Recursion, already locked in drm_attach/drm_load -- dumbbell@ + DRM_UNLOCK(rdev->ddev); return; } } @@ -299,7 +299,7 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev) sx_xunlock(&rdev->ring_lock); sx_xunlock(&rdev->pm.mclk_lock); - //DRM_UNLOCK(rdev->ddev); XXX Recursion, already locked in drm_attach/drm_load -- dumbbell@ + DRM_UNLOCK(rdev->ddev); } static void radeon_pm_print_states(struct radeon_device *rdev) @@ -336,7 +336,7 @@ static void radeon_pm_print_states(struct radeon_device *rdev) } } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static ssize_t radeon_get_pm_profile(struct device *dev, struct device_attribute *attr, char *buf) @@ -421,9 +421,9 @@ static ssize_t radeon_set_pm_method(struct device *dev, rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; rdev->pm.pm_method = PM_METHOD_PROFILE; sx_xunlock(&rdev->pm.mutex); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } else { count = -EINVAL; goto fail; @@ -488,15 +488,15 @@ static struct attribute *hwmon_attributes[] = { static const struct attribute_group hwmon_attrgroup = { .attrs = hwmon_attributes, }; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ static int radeon_hwmon_init(struct radeon_device *rdev) { int err = 0; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP rdev->pm.int_hwmon_dev = NULL; -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ switch (rdev->pm.int_thermal_type) { case THERMAL_TYPE_RV6XX: @@ -508,7 +508,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) /* No support for TN yet */ if (rdev->family == CHIP_ARUBA) return err; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); if (IS_ERR(rdev->pm.int_hwmon_dev)) { err = PTR_ERR(rdev->pm.int_hwmon_dev); @@ -524,7 +524,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) "Unable to create hwmon sysfs file: %d\n", err); hwmon_device_unregister(rdev->dev); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ break; default: break; @@ -535,12 +535,12 @@ static int radeon_hwmon_init(struct radeon_device *rdev) static void radeon_hwmon_fini(struct radeon_device *rdev) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (rdev->pm.int_hwmon_dev) { sysfs_remove_group(&rdev->pm.int_hwmon_dev->kobj, &hwmon_attrgroup); hwmon_device_unregister(rdev->pm.int_hwmon_dev); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } void radeon_pm_suspend(struct radeon_device *rdev) @@ -552,9 +552,9 @@ void radeon_pm_suspend(struct radeon_device *rdev) } sx_xunlock(&rdev->pm.mutex); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } void radeon_pm_resume(struct radeon_device *rdev) @@ -585,10 +585,10 @@ void radeon_pm_resume(struct radeon_device *rdev) if (rdev->pm.pm_method == PM_METHOD_DYNPM && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP schedule_delayed_work(&rdev->pm.dynpm_idle_work, msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } sx_xunlock(&rdev->pm.mutex); radeon_pm_compute_clocks(rdev); @@ -640,20 +640,20 @@ int radeon_pm_init(struct radeon_device *rdev) if (ret) return ret; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ if (rdev->pm.num_power_states > 1) { /* where's the best place to put these? */ -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP ret = device_create_file(rdev->dev, &dev_attr_power_profile); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ if (ret) DRM_ERROR("failed to create device file for power profile\n"); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP ret = device_create_file(rdev->dev, &dev_attr_power_method); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ if (ret) DRM_ERROR("failed to create device file for power method\n"); @@ -670,7 +670,6 @@ int radeon_pm_init(struct radeon_device *rdev) void radeon_pm_fini(struct radeon_device *rdev) { if (rdev->pm.num_power_states > 1) { - DRM_UNLOCK(rdev->ddev); /* Work around LOR. */ sx_xlock(&rdev->pm.mutex); if (rdev->pm.pm_method == PM_METHOD_PROFILE) { rdev->pm.profile = PM_PROFILE_DEFAULT; @@ -683,14 +682,13 @@ void radeon_pm_fini(struct radeon_device *rdev) radeon_pm_set_clocks(rdev); } sx_xunlock(&rdev->pm.mutex); - DRM_LOCK(rdev->ddev); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); device_remove_file(rdev->dev, &dev_attr_power_profile); device_remove_file(rdev->dev, &dev_attr_power_method); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } if (rdev->pm.power_state) { @@ -735,9 +733,9 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev) if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { if (rdev->pm.active_crtc_count > 1) { if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP cancel_delayed_work(&rdev->pm.dynpm_idle_work); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; @@ -755,23 +753,23 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev) radeon_pm_get_dynpm_state(rdev); radeon_pm_set_clocks(rdev); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP schedule_delayed_work(&rdev->pm.dynpm_idle_work, msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP schedule_delayed_work(&rdev->pm.dynpm_idle_work, msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ DRM_DEBUG_DRIVER("radeon: dynamic power management activated\n"); } } else { /* count == 0 */ if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP cancel_delayed_work(&rdev->pm.dynpm_idle_work); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; @@ -816,7 +814,7 @@ static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish return in_vbl; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static void radeon_dynpm_idle_work_handler(struct work_struct *work) { struct radeon_device *rdev; @@ -877,7 +875,7 @@ static void radeon_dynpm_idle_work_handler(struct work_struct *work) sx_xunlock(&rdev->pm.mutex); ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /* * Debugfs info @@ -891,7 +889,11 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data) struct radeon_device *rdev = dev->dev_private; seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); - seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); + /* radeon_get_engine_clock is not reliable on APUs so just print the current clock */ + if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) + seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); + else + seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); if (rdev->asic->pm.get_memory_clock) seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); diff --git a/sys/dev/drm2/radeon/radeon_ring.c b/sys/dev/drm2/radeon/radeon_ring.c index 37d0ade..387182a 100644 --- a/sys/dev/drm2/radeon/radeon_ring.c +++ b/sys/dev/drm2/radeon/radeon_ring.c @@ -36,7 +36,7 @@ __FBSDID("$FreeBSD$"); #include "radeon.h" #include "atom.h" -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP /* * IB * IBs (Indirect Buffers) and areas of GPU accessible memory where @@ -47,7 +47,7 @@ __FBSDID("$FreeBSD$"); * put in IBs for execution by the requested ring. */ static int radeon_debugfs_sa_init(struct radeon_device *rdev); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ /** * radeon_ib_get - request an IB (Indirect Buffer) @@ -165,7 +165,8 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, radeon_semaphore_free(rdev, &ib->semaphore, NULL); } /* if we can't remember our last VM flush then flush now! */ - if (ib->vm && !ib->vm->last_flush) { + /* XXX figure out why we have to flush for every IB */ + if (ib->vm /*&& !ib->vm->last_flush*/) { radeon_ring_vm_flush(rdev, ib->ring, ib->vm); } if (const_ib) { @@ -219,11 +220,11 @@ int radeon_ib_pool_init(struct radeon_device *rdev) } rdev->ib_pool_ready = true; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (radeon_debugfs_sa_init(rdev)) { dev_err(rdev->dev, "failed to register debugfs file for SA\n"); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ return 0; } @@ -284,7 +285,7 @@ int radeon_ib_ring_tests(struct radeon_device *rdev) return 0; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP /* * Rings * Most engines on the GPU are fed via ring buffers. Ring @@ -299,9 +300,8 @@ int radeon_ib_ring_tests(struct radeon_device *rdev) * them until the pointers are equal again. */ static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ -#if defined(DRM_DEBUG_CODE) && DRM_DEBUG_CODE != 0 /** * radeon_ring_write - write a value to the ring * @@ -322,7 +322,6 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v) ring->count_dw--; ring->ring_free_dw--; } -#endif /** * radeon_ring_supports_scratch_reg - check if the ring supports @@ -623,7 +622,7 @@ unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring } /* and then save the content of the ring */ - *data = malloc(size * sizeof(uint32_t), DRM_MEM_DRIVER, M_WAITOK); + *data = malloc(size * sizeof(uint32_t), DRM_MEM_DRIVER, M_NOWAIT); if (!*data) { sx_xunlock(&rdev->ring_lock); return 0; @@ -690,7 +689,7 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop) { int r; - void *ring_ptr; + void *ring_ptr; /* FreeBSD: to please GCC 4.2. */ ring->ring_size = ring_size; ring->rptr_offs = rptr_offs; @@ -738,11 +737,11 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig ring->next_rptr_gpu_addr = rdev->wb.gpu_addr + index; ring->next_rptr_cpu_addr = &rdev->wb.wb[index/4]; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP if (radeon_debugfs_ring_init(rdev, ring)) { DRM_ERROR("Failed to register debugfs file for rings !\n"); } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ radeon_ring_lockup_update(ring); return 0; } @@ -852,7 +851,7 @@ static struct drm_info_list radeon_debugfs_sa_list[] = { #endif -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring) { #if defined(CONFIG_DEBUG_FS) @@ -881,4 +880,4 @@ static int radeon_debugfs_sa_init(struct radeon_device *rdev) return 0; #endif } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ diff --git a/sys/dev/drm2/radeon/radeon_sa.c b/sys/dev/drm2/radeon/radeon_sa.c index 25695a4..9290612 100644 --- a/sys/dev/drm2/radeon/radeon_sa.c +++ b/sys/dev/drm2/radeon/radeon_sa.c @@ -327,7 +327,7 @@ int radeon_sa_bo_new(struct radeon_device *rdev, KASSERT(align <= RADEON_GPU_PAGE_SIZE, ("align > RADEON_GPU_PAGE_SIZE")); KASSERT(size <= sa_manager->size, ("size > sa_manager->size")); - *sa_bo = malloc(sizeof(struct radeon_sa_bo), DRM_MEM_DRIVER, M_WAITOK); + *sa_bo = malloc(sizeof(struct radeon_sa_bo), DRM_MEM_DRIVER, M_NOWAIT); if ((*sa_bo) == NULL) { return -ENOMEM; } diff --git a/sys/dev/drm2/radeon/radeon_semaphore.c b/sys/dev/drm2/radeon/radeon_semaphore.c index 717a94a..ecd09dd 100644 --- a/sys/dev/drm2/radeon/radeon_semaphore.c +++ b/sys/dev/drm2/radeon/radeon_semaphore.c @@ -41,7 +41,7 @@ int radeon_semaphore_create(struct radeon_device *rdev, int r; *semaphore = malloc(sizeof(struct radeon_semaphore), - DRM_MEM_DRIVER, M_WAITOK); + DRM_MEM_DRIVER, M_NOWAIT); if (*semaphore == NULL) { return -ENOMEM; } diff --git a/sys/dev/drm2/radeon/radeon_state.c b/sys/dev/drm2/radeon/radeon_state.c index 1716830..d5aa9d1 100644 --- a/sys/dev/drm2/radeon/radeon_state.c +++ b/sys/dev/drm2/radeon/radeon_state.c @@ -1534,7 +1534,7 @@ static void radeon_cp_dispatch_vertex(struct drm_device * dev, drm_radeon_tcl_prim_t * prim) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv; int offset = dev_priv->gart_buffers_offset + buf->offset + prim->start; int numverts = (int)prim->numverts; @@ -1916,7 +1916,7 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev, ADVANCE_RING(); COMMIT_RING(); - radeon_cp_discard_buffer(dev, file_priv->masterp, buf); + radeon_cp_discard_buffer(dev, file_priv->master, buf); /* Update the input parameters for next time */ image->y += height; @@ -2156,7 +2156,7 @@ static int radeon_surface_free(struct drm_device *dev, void *data, struct drm_fi static int radeon_cp_clear(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv; drm_radeon_clear_t *clear = data; drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS]; @@ -2173,7 +2173,7 @@ static int radeon_cp_clear(struct drm_device *dev, void *data, struct drm_file * sarea_priv->nbox * sizeof(depth_boxes[0]))) return -EFAULT; - radeon_cp_dispatch_clear(dev, file_priv->masterp, clear, depth_boxes); + radeon_cp_dispatch_clear(dev, file_priv->master, clear, depth_boxes); COMMIT_RING(); return 0; @@ -2220,9 +2220,9 @@ static int radeon_cp_flip(struct drm_device *dev, void *data, struct drm_file *f RING_SPACE_TEST_WITH_RETURN(dev_priv); if (!dev_priv->page_flipping) - radeon_do_init_pageflip(dev, file_priv->masterp); + radeon_do_init_pageflip(dev, file_priv->master); - radeon_cp_dispatch_flip(dev, file_priv->masterp); + radeon_cp_dispatch_flip(dev, file_priv->master); COMMIT_RING(); return 0; @@ -2231,7 +2231,7 @@ static int radeon_cp_flip(struct drm_device *dev, void *data, struct drm_file *f static int radeon_cp_swap(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; drm_radeon_sarea_t *sarea_priv = master_priv->sarea_priv; DRM_DEBUG("\n"); @@ -2246,7 +2246,7 @@ static int radeon_cp_swap(struct drm_device *dev, void *data, struct drm_file *f if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) r600_cp_dispatch_swap(dev, file_priv); else - radeon_cp_dispatch_swap(dev, file_priv->masterp); + radeon_cp_dispatch_swap(dev, file_priv->master); sarea_priv->ctx_owner = 0; COMMIT_RING(); @@ -2256,7 +2256,7 @@ static int radeon_cp_swap(struct drm_device *dev, void *data, struct drm_file *f static int radeon_cp_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; drm_radeon_sarea_t *sarea_priv; struct drm_device_dma *dma = dev->dma; struct drm_buf *buf; @@ -2325,7 +2325,7 @@ static int radeon_cp_vertex(struct drm_device *dev, void *data, struct drm_file } if (vertex->discard) { - radeon_cp_discard_buffer(dev, file_priv->masterp, buf); + radeon_cp_discard_buffer(dev, file_priv->master, buf); } COMMIT_RING(); @@ -2335,7 +2335,7 @@ static int radeon_cp_vertex(struct drm_device *dev, void *data, struct drm_file static int radeon_cp_indices(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; drm_radeon_sarea_t *sarea_priv; struct drm_device_dma *dma = dev->dma; struct drm_buf *buf; @@ -2414,9 +2414,9 @@ static int radeon_cp_indices(struct drm_device *dev, void *data, struct drm_file prim.numverts = RADEON_MAX_VB_VERTS; /* duh */ prim.vc_format = sarea_priv->vc_format; - radeon_cp_dispatch_indices(dev, file_priv->masterp, buf, &prim); + radeon_cp_dispatch_indices(dev, file_priv->master, buf, &prim); if (elts->discard) { - radeon_cp_discard_buffer(dev, file_priv->masterp, buf); + radeon_cp_discard_buffer(dev, file_priv->master, buf); } COMMIT_RING(); @@ -2532,7 +2532,7 @@ static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_fil } if (indirect->discard) { - radeon_cp_discard_buffer(dev, file_priv->masterp, buf); + radeon_cp_discard_buffer(dev, file_priv->master, buf); } COMMIT_RING(); @@ -2542,7 +2542,7 @@ static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_fil static int radeon_cp_vertex2(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; drm_radeon_sarea_t *sarea_priv; struct drm_device_dma *dma = dev->dma; struct drm_buf *buf; @@ -2614,7 +2614,7 @@ static int radeon_cp_vertex2(struct drm_device *dev, void *data, struct drm_file tclprim.offset = prim.numverts * 64; tclprim.numverts = RADEON_MAX_VB_VERTS; /* duh */ - radeon_cp_dispatch_indices(dev, file_priv->masterp, buf, &tclprim); + radeon_cp_dispatch_indices(dev, file_priv->master, buf, &tclprim); } else { tclprim.numverts = prim.numverts; tclprim.offset = 0; /* not used */ @@ -2627,7 +2627,7 @@ static int radeon_cp_vertex2(struct drm_device *dev, void *data, struct drm_file } if (vertex->discard) { - radeon_cp_discard_buffer(dev, file_priv->masterp, buf); + radeon_cp_discard_buffer(dev, file_priv->master, buf); } COMMIT_RING(); @@ -2965,7 +2965,7 @@ static int radeon_cp_cmdbuf(struct drm_device *dev, void *data, goto err; } - radeon_cp_discard_buffer(dev, file_priv->masterp, buf); + radeon_cp_discard_buffer(dev, file_priv->master, buf); break; case RADEON_CMD_PACKET3: @@ -3066,7 +3066,7 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil case RADEON_PARAM_STATUS_HANDLE: value = dev_priv->ring_rptr_offset; break; -#ifndef __LP64__ +#if BITS_PER_LONG == 32 /* * This ioctl() doesn't work on 64-bit platforms because hw_lock is a * pointer which can't fit into an int-sized variable. According to @@ -3128,7 +3128,7 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil static int radeon_cp_setparam(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; - struct drm_radeon_master_private *master_priv = file_priv->masterp->driver_priv; + struct drm_radeon_master_private *master_priv = file_priv->master->driver_priv; drm_radeon_setparam_t *sp = data; struct drm_radeon_driver_file_fields *radeon_priv; @@ -3206,7 +3206,7 @@ int radeon_driver_open(struct drm_device *dev, struct drm_file *file_priv) struct drm_radeon_driver_file_fields *radeon_priv; DRM_DEBUG("\n"); - radeon_priv = malloc(sizeof(*radeon_priv), DRM_MEM_DRIVER, M_WAITOK); + radeon_priv = malloc(sizeof(*radeon_priv), DRM_MEM_DRIVER, M_NOWAIT); if (!radeon_priv) return -ENOMEM; @@ -3259,4 +3259,4 @@ struct drm_ioctl_desc radeon_ioctls[] = { DRM_IOCTL_DEF_DRV(RADEON_CS, r600_cs_legacy_ioctl, DRM_AUTH) }; -int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls); +int radeon_max_ioctl = ARRAY_SIZE(radeon_ioctls); diff --git a/sys/dev/drm2/radeon/radeon_test.c b/sys/dev/drm2/radeon/radeon_test.c index 7774699..94bb9f3 100644 --- a/sys/dev/drm2/radeon/radeon_test.c +++ b/sys/dev/drm2/radeon/radeon_test.c @@ -70,7 +70,7 @@ static void radeon_do_test_moves(struct radeon_device *rdev, int flag) n -= rdev->ih.ring_size; n /= size; - gtt_obj = malloc(n * sizeof(*gtt_obj), DRM_MEM_DRIVER, M_ZERO | M_WAITOK); + gtt_obj = malloc(n * sizeof(*gtt_obj), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (!gtt_obj) { DRM_ERROR("Failed to allocate %d pointers\n", n); r = 1; @@ -291,7 +291,7 @@ void radeon_test_ring_sync(struct radeon_device *rdev, } radeon_ring_unlock_commit(rdev, ringA); - DRM_MDELAY(1000); + mdelay(1000); if (radeon_fence_signaled(fence1)) { DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n"); @@ -312,7 +312,7 @@ void radeon_test_ring_sync(struct radeon_device *rdev, goto out_cleanup; } - DRM_MDELAY(1000); + mdelay(1000); if (radeon_fence_signaled(fence2)) { DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n"); @@ -390,7 +390,7 @@ static void radeon_test_ring_sync2(struct radeon_device *rdev, } radeon_ring_unlock_commit(rdev, ringB); - DRM_MDELAY(1000); + mdelay(1000); if (radeon_fence_signaled(fenceA)) { DRM_ERROR("Fence A signaled without waiting for semaphore.\n"); @@ -410,7 +410,7 @@ static void radeon_test_ring_sync2(struct radeon_device *rdev, radeon_ring_unlock_commit(rdev, ringC); for (i = 0; i < 30; ++i) { - DRM_MDELAY(100); + mdelay(100); sigA = radeon_fence_signaled(fenceA); sigB = radeon_fence_signaled(fenceB); if (sigA || sigB) @@ -435,7 +435,7 @@ static void radeon_test_ring_sync2(struct radeon_device *rdev, radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore); radeon_ring_unlock_commit(rdev, ringC); - DRM_MDELAY(1000); + mdelay(1000); r = radeon_fence_wait(fenceA, false); if (r) { diff --git a/sys/dev/drm2/radeon/radeon_ttm.c b/sys/dev/drm2/radeon/radeon_ttm.c index f4ac178..abfe774 100644 --- a/sys/dev/drm2/radeon/radeon_ttm.c +++ b/sys/dev/drm2/radeon/radeon_ttm.c @@ -561,13 +561,13 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev, rdev = radeon_get_rdev(bdev); #if __OS_HAS_AGP if (rdev->flags & RADEON_IS_AGP) { - return ttm_agp_tt_create(bdev, rdev->ddev->agp->agpdev, + return ttm_agp_tt_create(bdev, rdev->ddev->agp->bridge, size, page_flags, dummy_read_page); } #endif gtt = malloc(sizeof(struct radeon_ttm_tt), - DRM_MEM_DRIVER, M_WAITOK | M_ZERO); + DRM_MEM_DRIVER, M_NOWAIT | M_ZERO); if (gtt == NULL) { return NULL; } @@ -586,25 +586,21 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm) struct radeon_ttm_tt *gtt = (void *)ttm; unsigned i; int r; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ if (ttm->state != tt_unpopulated) return 0; -#ifdef DUMBBELL_WIP - /* - * Maybe unneeded on FreeBSD. - * -- dumbbell@ - */ +#ifdef FREEBSD_WIP if (slave && ttm->sg) { drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages, gtt->ttm.dma_address, ttm->num_pages); ttm->state = tt_unbound; return 0; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ rdev = radeon_get_rdev(ttm->bdev); #if __OS_HAS_AGP @@ -626,7 +622,7 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm) for (i = 0; i < ttm->num_pages; i++) { gtt->ttm.dma_address[i] = VM_PAGE_TO_PHYS(ttm->pages[i]); -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP gtt->ttm.dma_address[i] = pci_map_page(rdev->pdev, ttm->pages[i], 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); @@ -639,7 +635,7 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm) ttm_pool_unpopulate(ttm); return -EFAULT; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } return 0; } @@ -672,10 +668,10 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) for (i = 0; i < ttm->num_pages; i++) { if (gtt->ttm.dma_address[i]) { gtt->ttm.dma_address[i] = 0; -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i], PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ } } @@ -704,7 +700,7 @@ static struct ttm_bo_driver radeon_bo_driver = { int radeon_ttm_init(struct radeon_device *rdev) { - int r, r2; + int r; r = radeon_ttm_global_init(rdev); if (r) { @@ -750,12 +746,6 @@ int radeon_ttm_init(struct radeon_device *rdev) rdev->mc.gtt_size >> PAGE_SHIFT); if (r) { DRM_ERROR("Failed initializing GTT heap.\n"); - r2 = radeon_bo_reserve(rdev->stollen_vga_memory, false); - if (likely(r2 == 0)) { - radeon_bo_unpin(rdev->stollen_vga_memory); - radeon_bo_unreserve(rdev->stollen_vga_memory); - } - radeon_bo_unref(&rdev->stollen_vga_memory); return r; } DRM_INFO("radeon: %uM of GTT memory ready.\n", @@ -764,12 +754,6 @@ int radeon_ttm_init(struct radeon_device *rdev) r = radeon_ttm_debugfs_init(rdev); if (r) { DRM_ERROR("Failed to init debugfs\n"); - r2 = radeon_bo_reserve(rdev->stollen_vga_memory, false); - if (likely(r2 == 0)) { - radeon_bo_unpin(rdev->stollen_vga_memory); - radeon_bo_unreserve(rdev->stollen_vga_memory); - } - radeon_bo_unref(&rdev->stollen_vga_memory); return r; } return 0; @@ -812,7 +796,7 @@ void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) man->size = size >> PAGE_SHIFT; } -#ifdef DUMBBELL_WIP +#ifdef FREEBSD_WIP static struct vm_operations_struct radeon_ttm_vm_ops; static const struct vm_operations_struct *ttm_vm_ops = NULL; @@ -860,7 +844,7 @@ int radeon_mmap(struct file *filp, struct vm_area_struct *vma) vma->vm_ops = &radeon_ttm_vm_ops; return 0; } -#endif /* DUMBBELL_WIP */ +#endif /* FREEBSD_WIP */ #define RADEON_DEBUGFS_MEM_TYPES 2 diff --git a/sys/dev/drm2/radeon/rs400.c b/sys/dev/drm2/radeon/rs400.c index f9d638d..714c36b 100644 --- a/sys/dev/drm2/radeon/rs400.c +++ b/sys/dev/drm2/radeon/rs400.c @@ -173,12 +173,9 @@ int rs400_gart_enable(struct radeon_device *rdev) WREG32_MC(RS480_AGP_MODE_CNTL, (1 << RS480_REQ_TYPE_SNOOP_SHIFT) | RS480_REQ_TYPE_SNOOP_DIS); /* Disable AGP mode */ + /* FIXME: according to doc we should set HIDE_MMCFG_BAR=0, + * AGPMODE30=0 & AGP30ENHANCED=0 in NB_CNTL */ if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) { - tmp = RREG32_MC(RS690_MC_NB_CNTL); - tmp &= ~(RS690_HIDE_MMCFG_BAR | - RS690_AGPMODE30 | - RS690_AGP30ENHANCED); - WREG32_MC(RS690_MC_NB_CNTL, tmp); WREG32_MC(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN)); } else { @@ -223,7 +220,7 @@ int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) return -EINVAL; } - entry = (lower_32_bits(addr) & 0xfffff000) | + entry = (lower_32_bits(addr) & ~PAGE_MASK) | ((upper_32_bits(addr) & 0xff) << 4) | RS400_PTE_WRITEABLE | RS400_PTE_READABLE; entry = cpu_to_le32(entry); diff --git a/sys/dev/drm2/radeon/rs600.c b/sys/dev/drm2/radeon/rs600.c index 11edbdf..73d0d0c 100644 --- a/sys/dev/drm2/radeon/rs600.c +++ b/sys/dev/drm2/radeon/rs600.c @@ -48,6 +48,9 @@ __FBSDID("$FreeBSD$"); #include "rs600_reg_safe.h" static void rs600_gpu_init(struct radeon_device *rdev); +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +int rs600_mc_wait_for_idle(struct radeon_device *rdev); +#endif static const u32 crtc_offsets[2] = { @@ -55,23 +58,59 @@ static const u32 crtc_offsets[2] = AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL }; +static bool avivo_is_in_vblank(struct radeon_device *rdev, int crtc) +{ + if (RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK) + return true; + else + return false; +} + +static bool avivo_is_counter_moving(struct radeon_device *rdev, int crtc) +{ + u32 pos1, pos2; + + pos1 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]); + pos2 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]); + + if (pos1 != pos2) + return true; + else + return false; +} + +/** + * avivo_wait_for_vblank - vblank wait asic callback. + * + * @rdev: radeon_device pointer + * @crtc: crtc to wait for vblank on + * + * Wait for vblank on the requested crtc (r5xx-r7xx). + */ void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc) { - int i; + unsigned i = 0; if (crtc >= rdev->num_crtc) return; - if (RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN) { - for (i = 0; i < rdev->usec_timeout; i++) { - if (!(RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK)) + if (!(RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN)) + return; + + /* depending on when we hit vblank, we may be close to active; if so, + * wait for another frame. + */ + while (avivo_is_in_vblank(rdev, crtc)) { + if (i++ % 100 == 0) { + if (!avivo_is_counter_moving(rdev, crtc)) break; - DRM_UDELAY(1); } - for (i = 0; i < rdev->usec_timeout; i++) { - if (RREG32(AVIVO_D1CRTC_STATUS + crtc_offsets[crtc]) & AVIVO_D1CRTC_V_BLANK) + } + + while (!avivo_is_in_vblank(rdev, crtc)) { + if (i++ % 100 == 0) { + if (!avivo_is_counter_moving(rdev, crtc)) break; - DRM_UDELAY(1); } } } @@ -108,7 +147,7 @@ u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) for (i = 0; i < rdev->usec_timeout; i++) { if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) break; - DRM_UDELAY(1); + udelay(1); } DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n"); @@ -137,7 +176,7 @@ void rs600_pm_misc(struct radeon_device *rdev) tmp &= ~(voltage->gpio.mask); WREG32(voltage->gpio.reg, tmp); if (voltage->delay) - DRM_UDELAY(voltage->delay); + udelay(voltage->delay); } else { tmp = RREG32(voltage->gpio.reg); if (voltage->active_high) @@ -146,7 +185,7 @@ void rs600_pm_misc(struct radeon_device *rdev) tmp |= voltage->gpio.mask; WREG32(voltage->gpio.reg, tmp); if (voltage->delay) - DRM_UDELAY(voltage->delay); + udelay(voltage->delay); } } else if (voltage->type == VOLTAGE_VDDC) radeon_atom_set_voltage(rdev, voltage->vddc_id, SET_VOLTAGE_TYPE_ASIC_VDDC); @@ -376,30 +415,30 @@ int rs600_asic_reset(struct radeon_device *rdev) pci_save_state(device_get_parent(rdev->dev)); /* disable bus mastering */ pci_disable_busmaster(rdev->dev); - DRM_MDELAY(1); + mdelay(1); /* reset GA+VAP */ WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) | S_0000F0_SOFT_RESET_GA(1)); RREG32(R_0000F0_RBBM_SOFT_RESET); - DRM_MDELAY(500); + mdelay(500); WREG32(R_0000F0_RBBM_SOFT_RESET, 0); - DRM_MDELAY(1); + mdelay(1); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* reset CP */ WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_CP(1)); RREG32(R_0000F0_RBBM_SOFT_RESET); - DRM_MDELAY(500); + mdelay(500); WREG32(R_0000F0_RBBM_SOFT_RESET, 0); - DRM_MDELAY(1); + mdelay(1); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* reset MC */ WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_MC(1)); RREG32(R_0000F0_RBBM_SOFT_RESET); - DRM_MDELAY(500); + mdelay(500); WREG32(R_0000F0_RBBM_SOFT_RESET, 0); - DRM_MDELAY(1); + mdelay(1); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* restore PCI & busmastering */ @@ -659,7 +698,7 @@ void rs600_irq_disable(struct radeon_device *rdev) WREG32(R_000040_GEN_INT_CNTL, 0); WREG32(R_006540_DxMODE_INT_MASK, 0); /* Wait and acknowledge irq */ - DRM_MDELAY(1); + mdelay(1); rs600_irq_ack(rdev); } @@ -751,7 +790,7 @@ int rs600_mc_wait_for_idle(struct radeon_device *rdev) for (i = 0; i < rdev->usec_timeout; i++) { if (G_000000_MC_IDLE(RREG32_MC(R_000000_MC_STATUS))) return 0; - DRM_UDELAY(1); + udelay(1); } return -1; } @@ -835,7 +874,7 @@ static void rs600_debugfs(struct radeon_device *rdev) void rs600_set_safe_registers(struct radeon_device *rdev) { rdev->config.r300.reg_safe_bm = rs600_reg_safe_bm; - rdev->config.r300.reg_safe_bm_size = DRM_ARRAY_SIZE(rs600_reg_safe_bm); + rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs600_reg_safe_bm); } static void rs600_mc_program(struct radeon_device *rdev) diff --git a/sys/dev/drm2/radeon/rs690.c b/sys/dev/drm2/radeon/rs690.c index dbf64d9..2ff0485 100644 --- a/sys/dev/drm2/radeon/rs690.c +++ b/sys/dev/drm2/radeon/rs690.c @@ -45,7 +45,7 @@ int rs690_mc_wait_for_idle(struct radeon_device *rdev) tmp = RREG32_MC(R_000090_MC_SYSTEM_STATUS); if (G_000090_MC_SYSTEM_IDLE(tmp)) return 0; - DRM_UDELAY(1); + udelay(1); } return -1; } diff --git a/sys/dev/drm2/radeon/rv515.c b/sys/dev/drm2/radeon/rv515.c index ba292de..e41ba9a 100644 --- a/sys/dev/drm2/radeon/rv515.c +++ b/sys/dev/drm2/radeon/rv515.c @@ -40,6 +40,9 @@ __FBSDID("$FreeBSD$"); static int rv515_debugfs_pipes_info_init(struct radeon_device *rdev); static int rv515_debugfs_ga_info_init(struct radeon_device *rdev); static void rv515_gpu_init(struct radeon_device *rdev); +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +int rv515_mc_wait_for_idle(struct radeon_device *rdev); +#endif static const u32 crtc_offsets[2] = { @@ -304,16 +307,27 @@ void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save) tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]); if (!(tmp & AVIVO_CRTC_DISP_READ_REQUEST_DISABLE)) { radeon_wait_for_vblank(rdev, i); + WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 1); tmp |= AVIVO_CRTC_DISP_READ_REQUEST_DISABLE; WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp); + WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 0); } /* wait for the next frame */ frame_count = radeon_get_vblank_counter(rdev, i); for (j = 0; j < rdev->usec_timeout; j++) { if (radeon_get_vblank_counter(rdev, i) != frame_count) break; - DRM_UDELAY(1); + udelay(1); } + + /* XXX this is a hack to avoid strange behavior with EFI on certain systems */ + WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 1); + tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]); + tmp &= ~AVIVO_CRTC_EN; + WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp); + WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 0); + save->crtc_enabled[i] = false; + /* ***** */ } else { save->crtc_enabled[i] = false; } @@ -338,7 +352,23 @@ void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save) } } /* wait for the MC to settle */ - DRM_UDELAY(100); + udelay(100); + + /* lock double buffered regs */ + for (i = 0; i < rdev->num_crtc; i++) { + if (save->crtc_enabled[i]) { + tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]); + if (!(tmp & AVIVO_D1GRPH_UPDATE_LOCK)) { + tmp |= AVIVO_D1GRPH_UPDATE_LOCK; + WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp); + } + tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i]); + if (!(tmp & 1)) { + tmp |= 1; + WREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp); + } + } + } } void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save) @@ -349,7 +379,7 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save) /* update crtc base addresses */ for (i = 0; i < rdev->num_crtc; i++) { if (rdev->family >= CHIP_RV770) { - if (i == 1) { + if (i == 0) { WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start)); WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, @@ -368,6 +398,33 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save) } WREG32(R_000310_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start); + /* unlock regs and wait for update */ + for (i = 0; i < rdev->num_crtc; i++) { + if (save->crtc_enabled[i]) { + tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i]); + if ((tmp & 0x3) != 0) { + tmp &= ~0x3; + WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i], tmp); + } + tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]); + if (tmp & AVIVO_D1GRPH_UPDATE_LOCK) { + tmp &= ~AVIVO_D1GRPH_UPDATE_LOCK; + WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp); + } + tmp = RREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i]); + if (tmp & 1) { + tmp &= ~1; + WREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp); + } + for (j = 0; j < rdev->usec_timeout; j++) { + tmp = RREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i]); + if ((tmp & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) == 0) + break; + udelay(1); + } + } + } + if (rdev->family >= CHIP_R600) { /* unblackout the MC */ if (rdev->family >= CHIP_RV770) @@ -393,13 +450,13 @@ void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save) for (j = 0; j < rdev->usec_timeout; j++) { if (radeon_get_vblank_counter(rdev, i) != frame_count) break; - DRM_UDELAY(1); + udelay(1); } } } /* Unlock vga access */ WREG32(R_000328_VGA_HDP_CONTROL, save->vga_hdp_control); - DRM_MDELAY(1); + mdelay(1); WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control); } @@ -540,7 +597,7 @@ int rv515_suspend(struct radeon_device *rdev) void rv515_set_safe_registers(struct radeon_device *rdev) { rdev->config.r300.reg_safe_bm = rv515_reg_safe_bm; - rdev->config.r300.reg_safe_bm_size = DRM_ARRAY_SIZE(rv515_reg_safe_bm); + rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rv515_reg_safe_bm); } void rv515_fini(struct radeon_device *rdev) diff --git a/sys/dev/drm2/radeon/rv770.c b/sys/dev/drm2/radeon/rv770.c index 549ed90..4d6b67b 100644 --- a/sys/dev/drm2/radeon/rv770.c +++ b/sys/dev/drm2/radeon/rv770.c @@ -41,6 +41,9 @@ __FBSDID("$FreeBSD$"); #define R700_PM4_UCODE_SIZE 1360 static void rv770_gpu_init(struct radeon_device *rdev); +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +void rv770_fini(struct radeon_device *rdev); +#endif static void rv770_pcie_gen2_enable(struct radeon_device *rdev); u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) @@ -70,7 +73,7 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) for (i = 0; i < rdev->usec_timeout; i++) { if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) break; - DRM_UDELAY(1); + udelay(1); } DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n"); @@ -337,7 +340,7 @@ static int rv770_cp_load_microcode(struct radeon_device *rdev) /* Reset cp */ WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); RREG32(GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(GRBM_SOFT_RESET, 0); fw_data = (const __be32 *)rdev->pfp_fw->data; diff --git a/sys/dev/drm2/radeon/si.c b/sys/dev/drm2/radeon/si.c index 0fdefd2..8e18d8d 100644 --- a/sys/dev/drm2/radeon/si.c +++ b/sys/dev/drm2/radeon/si.c @@ -39,6 +39,33 @@ __FBSDID("$FreeBSD$"); #define SI_RLC_UCODE_SIZE 2048 #define SI_MC_UCODE_SIZE 7769 +#ifdef __linux__ +MODULE_FIRMWARE("radeon/TAHITI_pfp.bin"); +MODULE_FIRMWARE("radeon/TAHITI_me.bin"); +MODULE_FIRMWARE("radeon/TAHITI_ce.bin"); +MODULE_FIRMWARE("radeon/TAHITI_mc.bin"); +MODULE_FIRMWARE("radeon/TAHITI_rlc.bin"); +MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin"); +MODULE_FIRMWARE("radeon/PITCAIRN_me.bin"); +MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin"); +MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin"); +MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin"); +MODULE_FIRMWARE("radeon/VERDE_pfp.bin"); +MODULE_FIRMWARE("radeon/VERDE_me.bin"); +MODULE_FIRMWARE("radeon/VERDE_ce.bin"); +MODULE_FIRMWARE("radeon/VERDE_mc.bin"); +MODULE_FIRMWARE("radeon/VERDE_rlc.bin"); +#endif + +#ifdef FREEBSD_WIP /* FreeBSD: to please GCC 4.2. */ +extern int r600_ih_ring_alloc(struct radeon_device *rdev); +extern void r600_ih_ring_fini(struct radeon_device *rdev); +extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); +extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); +extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); +extern u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev); +#endif + /* get temperature in millidegrees */ int si_get_temp(struct radeon_device *rdev) { @@ -238,12 +265,12 @@ static int si_mc_load_microcode(struct radeon_device *rdev) for (i = 0; i < rdev->usec_timeout; i++) { if (RREG32(MC_SEQ_TRAIN_WAKEUP_CNTL) & TRAIN_DONE_D0) break; - DRM_UDELAY(1); + udelay(1); } for (i = 0; i < rdev->usec_timeout; i++) { if (RREG32(MC_SEQ_TRAIN_WAKEUP_CNTL) & TRAIN_DONE_D1) break; - DRM_UDELAY(1); + udelay(1); } if (running) @@ -1399,7 +1426,7 @@ static void si_select_se_sh(struct radeon_device *rdev, u32 data = INSTANCE_BROADCAST_WRITES; if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) - data = SH_BROADCAST_WRITES | SE_BROADCAST_WRITES; + data |= SH_BROADCAST_WRITES | SE_BROADCAST_WRITES; else if (se_num == 0xffffffff) data |= SE_BROADCAST_WRITES | SH_INDEX(sh_num); else if (sh_num == 0xffffffff) @@ -1684,6 +1711,7 @@ static void si_gpu_init(struct radeon_device *rdev) WREG32(GB_ADDR_CONFIG, gb_addr_config); WREG32(DMIF_ADDR_CONFIG, gb_addr_config); + WREG32(DMIF_ADDR_CALC, gb_addr_config); WREG32(HDP_ADDR_CONFIG, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); @@ -1747,7 +1775,7 @@ static void si_gpu_init(struct radeon_device *rdev) WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); - DRM_UDELAY(50); + udelay(50); } /* @@ -1867,7 +1895,7 @@ static void si_cp_enable(struct radeon_device *rdev, bool enable) rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false; rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; } - DRM_UDELAY(50); + udelay(50); } static int si_cp_load_microcode(struct radeon_device *rdev) @@ -2009,7 +2037,7 @@ static int si_cp_resume(struct radeon_device *rdev) SOFT_RESET_SPI | SOFT_RESET_SX)); RREG32(GRBM_SOFT_RESET); - DRM_MDELAY(15); + mdelay(15); WREG32(GRBM_SOFT_RESET, 0); RREG32(GRBM_SOFT_RESET); @@ -2048,7 +2076,7 @@ static int si_cp_resume(struct radeon_device *rdev) WREG32(SCRATCH_UMSK, 0); } - DRM_MDELAY(1); + mdelay(1); WREG32(CP_RB0_CNTL, tmp); WREG32(CP_RB0_BASE, ring->gpu_addr >> 8); @@ -2074,7 +2102,7 @@ static int si_cp_resume(struct radeon_device *rdev) WREG32(CP_RB1_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFFFFFFFC); WREG32(CP_RB1_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFF); - DRM_MDELAY(1); + mdelay(1); WREG32(CP_RB1_CNTL, tmp); WREG32(CP_RB1_BASE, ring->gpu_addr >> 8); @@ -2100,7 +2128,7 @@ static int si_cp_resume(struct radeon_device *rdev) WREG32(CP_RB2_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFFFFFFFC); WREG32(CP_RB2_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFF); - DRM_MDELAY(1); + mdelay(1); WREG32(CP_RB2_CNTL, tmp); WREG32(CP_RB2_BASE, ring->gpu_addr >> 8); @@ -2190,7 +2218,7 @@ static void si_gpu_soft_reset_gfx(struct radeon_device *rdev) dev_info(rdev->dev, " GRBM_SOFT_RESET=0x%08X\n", grbm_reset); WREG32(GRBM_SOFT_RESET, grbm_reset); (void)RREG32(GRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(GRBM_SOFT_RESET, 0); (void)RREG32(GRBM_SOFT_RESET); @@ -2229,7 +2257,7 @@ static void si_gpu_soft_reset_dma(struct radeon_device *rdev) /* Reset dma */ WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA | SOFT_RESET_DMA1); RREG32(SRBM_SOFT_RESET); - DRM_UDELAY(50); + udelay(50); WREG32(SRBM_SOFT_RESET, 0); dev_info(rdev->dev, " DMA_STATUS_REG = 0x%08X\n", @@ -2268,7 +2296,7 @@ static int si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) si_gpu_soft_reset_dma(rdev); /* Wait a little for things to settle down */ - DRM_UDELAY(50); + udelay(50); evergreen_mc_resume(rdev, &save); return 0; @@ -3645,7 +3673,7 @@ static void si_irq_disable(struct radeon_device *rdev) { si_disable_interrupts(rdev); /* Wait and acknowledge irq */ - DRM_MDELAY(1); + mdelay(1); si_irq_ack(rdev); si_disable_interrupt_state(rdev); } @@ -4257,6 +4285,7 @@ int si_resume(struct radeon_device *rdev) int si_suspend(struct radeon_device *rdev) { + radeon_vm_manager_fini(rdev); si_cp_enable(rdev, false); cayman_dma_stop(rdev); si_irq_suspend(rdev); diff --git a/sys/dev/drm2/radeon/si_blit_shaders.c b/sys/dev/drm2/radeon/si_blit_shaders.c index dc31fe3..483a93d 100644 --- a/sys/dev/drm2/radeon/si_blit_shaders.c +++ b/sys/dev/drm2/radeon/si_blit_shaders.c @@ -251,4 +251,4 @@ const u32 si_default_state[] = 0x00000010, /* */ }; -const u32 si_default_size = DRM_ARRAY_SIZE(si_default_state); +const u32 si_default_size = ARRAY_SIZE(si_default_state); diff --git a/sys/dev/drm2/radeon/sid.h b/sys/dev/drm2/radeon/sid.h index 7aa21c1..eaf95fb 100644 --- a/sys/dev/drm2/radeon/sid.h +++ b/sys/dev/drm2/radeon/sid.h @@ -63,6 +63,8 @@ __FBSDID("$FreeBSD$"); #define DMIF_ADDR_CONFIG 0xBD4 +#define DMIF_ADDR_CALC 0xC00 + #define SRBM_STATUS 0xE50 #define SRBM_SOFT_RESET 0x0E60 |
