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author | neel <neel@FreeBSD.org> | 2010-02-05 06:36:03 +0000 |
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committer | neel <neel@FreeBSD.org> | 2010-02-05 06:36:03 +0000 |
commit | f6bab2156aa3fc07f06a388457925c6c1c6a69da (patch) | |
tree | 1a3087f8c65f795d0a7c472961c84b5c627d9b13 /sys/dev/ciss/ciss.c | |
parent | 017831802664497b541a6c978286becda1315230 (diff) | |
download | FreeBSD-src-f6bab2156aa3fc07f06a388457925c6c1c6a69da.zip FreeBSD-src-f6bab2156aa3fc07f06a388457925c6c1c6a69da.tar.gz |
Correct a comment - we are not setting the exception level but rather are
disabling interrupts.
Simplify register usage - we can directly load 'curpcb' into 'k1' after
interrupts are disabled. There is no need to do so indirectly through 'a1'.
Diffstat (limited to 'sys/dev/ciss/ciss.c')
0 files changed, 0 insertions, 0 deletions