Enroll these drivers in multipass probing. The motivation behind this

is that the JBus to EBus bridges share the interrupt controller of a
sibling JBus to PCIe bridge (at least as far as the OFW device tree
is concerned, in reality they are part of the same chip) so we have to
probe and attach the latter first. That happens to be also the case
due to the fact that the JBus to PCIe bridges appear first in the OFW
device tree but it doesn't hurt to ensure the right order.

1 files changed, 5 insertions, 2 deletions

diff --git a/sys/dev/auxio/auxio.c b/sys/dev/auxio/auxio.c
index 6e2d356..35fd307 100644
--- a/sys/dev/auxio/auxio.c
+++ b/sys/dev/auxio/auxio.c
@@ -141,7 +141,9 @@ static driver_t auxio_sbus_driver = {
 };
 
 static devclass_t	auxio_devclass;
-DRIVER_MODULE(auxio, sbus, auxio_sbus_driver, auxio_devclass, 0, 0);
+/* The probe order is handled by sbus(4). */
+EARLY_DRIVER_MODULE(auxio, sbus, auxio_sbus_driver, auxio_devclass, 0, 0,
+    BUS_PASS_DEFAULT);
 MODULE_DEPEND(auxio, sbus, 1, 1, 1);
 
 /* EBus */
@@ -158,7 +160,8 @@ static driver_t auxio_ebus_driver = {
 	sizeof(struct auxio_softc)
 };
 
-DRIVER_MODULE(auxio, ebus, auxio_ebus_driver, auxio_devclass, 0, 0);
+EARLY_DRIVER_MODULE(auxio, ebus, auxio_ebus_driver, auxio_devclass, 0, 0,
+    BUS_PASS_DEFAULT);
 MODULE_DEPEND(auxio, ebus, 1, 1, 1);
 MODULE_VERSION(auxio, 1);