Importing pfSense patches net80211HEAD.tgz and conf.file.ieee80211.diff

1 files changed, 47 insertions, 2 deletions

diff --git a/sys/dev/ath/ah_osdep.c b/sys/dev/ath/ah_osdep.c
index 043ebed..fe4a657 100644
--- a/sys/dev/ath/ah_osdep.c
+++ b/sys/dev/ath/ah_osdep.c
@@ -96,9 +96,8 @@ static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0,
 
 #ifdef AH_DEBUG
 int ath_hal_debug = 0;
-SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
+SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RWTUN, &ath_hal_debug,
     0, "Atheros HAL debugging printfs");
-TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
 #endif /* AH_DEBUG */
 
 static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
@@ -138,6 +137,24 @@ ath_hal_ether_sprintf(const u_int8_t *mac)
 
 #ifdef AH_DEBUG
 
+/*
+ * XXX This is highly relevant only for the AR5416 and later
+ * PCI/PCIe NICs.  It'll need adjustment for other hardware
+ * variations.
+ */
+static int
+ath_hal_reg_whilst_asleep(struct ath_hal *ah, uint32_t reg)
+{
+
+	if (reg >= 0x4000 && reg < 0x5000)
+		return (1);
+	if (reg >= 0x6000 && reg < 0x7000)
+		return (1);
+	if (reg >= 0x7000 && reg < 0x8000)
+		return (1);
+	return (0);
+}
+
 void
 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
 {
@@ -253,6 +270,13 @@ ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
 	bus_space_tag_t tag = BUSTAG(ah);
 	bus_space_handle_t h = ah->ah_sh;
 
+	/* Debug - complain if we haven't fully waken things up */
+	if (! ath_hal_reg_whilst_asleep(ah, reg) &&
+	    ah->ah_powerMode != HAL_PM_AWAKE) {
+		ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n",
+		    __func__, reg, val, ah->ah_powerMode);
+	}
+
 	if (ath_hal_alq) {
 		struct ale *ale = ath_hal_alq_get(ah);
 		if (ale) {
@@ -278,6 +302,13 @@ ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
 	bus_space_handle_t h = ah->ah_sh;
 	u_int32_t val;
 
+	/* Debug - complain if we haven't fully waken things up */
+	if (! ath_hal_reg_whilst_asleep(ah, reg) &&
+	    ah->ah_powerMode != HAL_PM_AWAKE) {
+		ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n",
+		    __func__, reg, ah->ah_powerMode);
+	}
+
 	if (ah->ah_config.ah_serialise_reg_war)
 		mtx_lock_spin(&ah_regser_mtx);
 	val = bus_space_read_4(tag, h, reg);
@@ -330,6 +361,13 @@ ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
 	bus_space_tag_t tag = BUSTAG(ah);
 	bus_space_handle_t h = ah->ah_sh;
 
+	/* Debug - complain if we haven't fully waken things up */
+	if (! ath_hal_reg_whilst_asleep(ah, reg) &&
+	    ah->ah_powerMode != HAL_PM_AWAKE) {
+		ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n",
+		    __func__, reg, val, ah->ah_powerMode);
+	}
+
 	if (ah->ah_config.ah_serialise_reg_war)
 		mtx_lock_spin(&ah_regser_mtx);
 	bus_space_write_4(tag, h, reg, val);
@@ -344,6 +382,13 @@ ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
 	bus_space_handle_t h = ah->ah_sh;
 	u_int32_t val;
 
+	/* Debug - complain if we haven't fully waken things up */
+	if (! ath_hal_reg_whilst_asleep(ah, reg) &&
+	    ah->ah_powerMode != HAL_PM_AWAKE) {
+		ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n",
+		    __func__, reg, ah->ah_powerMode);
+	}
+
 	if (ah->ah_config.ah_serialise_reg_war)
 		mtx_lock_spin(&ah_regser_mtx);
 	val = bus_space_read_4(tag, h, reg);