[ath_hal] add AR9462 (jupiter) RX gain / XLNA programming.

This seems to make 5G work better.

It doesn't fix powersave handling though, that still sees the PHY get
stuck during initial calibration and everything goes pear shaped.
I'll look into that later.

Tested:

* QCAFN222 NIC, STA mode, 5GHz

Obtained from:	Linux ath9k

3 files changed, 60 insertions, 0 deletions

diff --git a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h
index e63b517..eccafba 100644
--- a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h
+++ b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h
@@ -635,6 +635,10 @@ struct ath_hal_9300 {
     struct ar9300_ini_array ah_ini_japan2484;
     struct ar9300_ini_array ah_ini_radio_post_sys2ant;
     struct ar9300_ini_array ah_ini_BTCOEX_MAX_TXPWR;
+    struct ar9300_ini_array ah_ini_modes_rxgain_xlna;
+    struct ar9300_ini_array ah_ini_modes_rxgain_bb_core;
+    struct ar9300_ini_array ah_ini_modes_rxgain_bb_postamble;
+
     /* 
      * New INI format starting with Osprey 2.0 INI.
      * Pre, core, post arrays for each sub-system (mac, bb, radio, soc)
diff --git a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c
index 45e71e1..2cd9d31 100644
--- a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c
+++ b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c
@@ -3542,14 +3542,50 @@ void ar9300_rx_gain_table_apply(struct ath_hal *ah)
             INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain, 
                 ar9300Common_mixed_rx_gain_table_jupiter_2p0,
                 ARRAY_LENGTH(ar9300Common_mixed_rx_gain_table_jupiter_2p0), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_core,
+                ar9462_2p0_baseband_core_mix_rxgain,
+                ARRAY_LENGTH(ar9462_2p0_baseband_core_mix_rxgain), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_postamble,
+                ar9462_2p0_baseband_postamble_mix_rxgain,
+                ARRAY_LENGTH(ar9462_2p0_baseband_postamble_mix_rxgain), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna,
+                ar9462_2p0_baseband_postamble_5g_xlna,
+                ARRAY_LENGTH(ar9462_2p0_baseband_postamble_5g_xlna), 2);
             break;
         }
         else if (AR_SREV_JUPITER_21(ah)) {
             INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain, 
                 ar9462_2p1_common_mixed_rx_gain,
                 ARRAY_LENGTH(ar9462_2p1_common_mixed_rx_gain), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_core,
+                ar9462_2p1_baseband_core_mix_rxgain,
+                ARRAY_LENGTH(ar9462_2p1_baseband_core_mix_rxgain), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_postamble,
+                ar9462_2p1_baseband_postamble_mix_rxgain,
+                ARRAY_LENGTH(ar9462_2p1_baseband_postamble_mix_rxgain), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna,
+                ar9462_2p1_baseband_postamble_5g_xlna,
+                ARRAY_LENGTH(ar9462_2p1_baseband_postamble_5g_xlna), 2);
+
             break;
         }
+    case 3:
+        if (AR_SREV_JUPITER_21(ah)) {
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain,
+                ar9462_2p1_common_5g_xlna_only_rxgain,
+                ARRAY_LENGTH(ar9462_2p1_common_5g_xlna_only_rxgain), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna,
+                ar9462_2p1_baseband_postamble_5g_xlna,
+                ARRAY_LENGTH(ar9462_2p1_baseband_postamble_5g_xlna), 2);
+        } else if (AR_SREV_JUPITER_20(ah)) {
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain,
+                ar9462_2p0_common_5g_xlna_only_rxgain,
+                ARRAY_LENGTH(ar9462_2p0_common_5g_xlna_only_rxgain), 2);
+            INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna,
+                ar9462_2p0_baseband_postamble_5g_xlna,
+                ARRAY_LENGTH(ar9462_2p0_baseband_postamble_5g_xlna), 2);
+        }
+        break;
     case 0:
     default:
         if (AR_SREV_HORNET_12(ah)) {
diff --git a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c
index 4da99cf..5a7b40f 100644
--- a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c
+++ b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c
@@ -3053,6 +3053,26 @@ ar9300_process_ini(struct ath_hal *ah, struct ieee80211_channel *chan,
     REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain, 1, reg_writes);
     HALDEBUG(ah, HAL_DEBUG_RESET, "ar9300_process_ini: Rx Gain programming\n");
 
+    if (AR_SREV_JUPITER_20_OR_LATER(ah)) {
+        /*
+         * CUS217 mix LNA mode.
+         */
+        if (ar9300_rx_gain_index_get(ah) == 2) {
+            REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_bb_core, 1, reg_writes);
+            REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_bb_postamble,
+                modes_index, reg_writes);
+        }
+
+        /*
+         * 5G-XLNA
+         */
+        if ((ar9300_rx_gain_index_get(ah) == 2) ||
+            (ar9300_rx_gain_index_get(ah) == 3)) {
+            REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_xlna, modes_index,
+              reg_writes);
+        }
+    }
+
     if (AR_SREV_SCORPION(ah)) {
         /* Write rxgain bounds Array */
         REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_bounds, modes_index, reg_writes);