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| author | wkoszek <wkoszek@FreeBSD.org> | 2013-04-27 23:07:49 +0000 |
|---|---|---|
| committer | wkoszek <wkoszek@FreeBSD.org> | 2013-04-27 23:07:49 +0000 |
| commit | e5f418e7442714adb1a3816294a5c53e1b00757b (patch) | |
| tree | 2adde5a354618dced93d3bed0c392bee59bd7836 /sys/arm | |
| parent | 815a6cc1e325a4e8596b91756039a7d699471b11 (diff) | |
| download | FreeBSD-src-e5f418e7442714adb1a3816294a5c53e1b00757b.zip FreeBSD-src-e5f418e7442714adb1a3816294a5c53e1b00757b.tar.gz | |
Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.
Submitted by: Thomas Skibo <ThomasSkibo (at) sbcglobal.net>
Tested by: wkoszek (ZedBoard)
Reviewed by: wkoszek, freebsd-arm@ (no objections raised)
Diffstat (limited to 'sys/arm')
| -rw-r--r-- | sys/arm/arm/cpufunc.c | 3 | ||||
| -rw-r--r-- | sys/arm/arm/identcpu.c | 2 | ||||
| -rw-r--r-- | sys/arm/include/armreg.h | 1 |
3 files changed, 5 insertions, 1 deletions
diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index 1d15e27..f235951 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -1480,7 +1480,8 @@ set_cpufuncs() cputype == CPU_ID_CORTEXA8R2 || cputype == CPU_ID_CORTEXA8R3 || cputype == CPU_ID_CORTEXA9R1 || - cputype == CPU_ID_CORTEXA9R2) { + cputype == CPU_ID_CORTEXA9R2 || + cputype == CPU_ID_CORTEXA9R3) { cpufuncs = cortexa_cpufuncs; cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ get_cachetype_cp15(); diff --git a/sys/arm/arm/identcpu.c b/sys/arm/arm/identcpu.c index 56f6e06..414396a 100644 --- a/sys/arm/arm/identcpu.c +++ b/sys/arm/arm/identcpu.c @@ -246,6 +246,8 @@ const struct cpuidtab cpuids[] = { generic_steppings }, { CPU_ID_CORTEXA9R2, CPU_CLASS_CORTEXA, "Cortex A9-r2", generic_steppings }, + { CPU_ID_CORTEXA9R3, CPU_CLASS_CORTEXA, "Cortex A9-r3", + generic_steppings }, { CPU_ID_SA110, CPU_CLASS_SA1, "SA-110", sa110_steppings }, diff --git a/sys/arm/include/armreg.h b/sys/arm/include/armreg.h index 35fe6d7..238dfe2 100644 --- a/sys/arm/include/armreg.h +++ b/sys/arm/include/armreg.h @@ -152,6 +152,7 @@ #define CPU_ID_CORTEXA8R3 0x413fc080 #define CPU_ID_CORTEXA9R1 0x411fc090 #define CPU_ID_CORTEXA9R2 0x412fc090 +#define CPU_ID_CORTEXA9R3 0x413fc090 #define CPU_ID_SA110 0x4401a100 #define CPU_ID_SA1100 0x4401a110 #define CPU_ID_TI925T 0x54029250 |
