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| author | ian <ian@FreeBSD.org> | 2017-03-01 21:11:36 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2017-03-01 21:11:36 +0000 |
| commit | 9a83dc9d3348d95e42fb9e36fb065ae52a97e8cc (patch) | |
| tree | a71ef535729338ee9af219d6c1ac1e0705615a32 /sys/arm | |
| parent | 6a949fe4fcc82742a9bb43519f5589ee70c1e462 (diff) | |
| download | FreeBSD-src-9a83dc9d3348d95e42fb9e36fb065ae52a97e8cc.zip FreeBSD-src-9a83dc9d3348d95e42fb9e36fb065ae52a97e8cc.tar.gz | |
MFC r312859:
Configure the timer capture pin to input mode in the timer control
register, in addition to configuring it as input with the pinmux driver.
There was a control register bit commented as "no desc in datasheet". A
later revision of the manual reveals the bit to be an input/output control
for the timer pin. In addition to configuring capture or pulse mode, you
apparently have to separately configure the pin direction in the timer
control register.
Before this change, the timer block was apparently driving a signal onto a
pad configured by pinmux as input. Capture mode still accidentally worked
for me during testing because I was using a very strong signal source that
just out-muscled the weaker drive from the misconfigured pin.
Diffstat (limited to 'sys/arm')
| -rw-r--r-- | sys/arm/ti/am335x/am335x_dmtpps.c | 8 | ||||
| -rw-r--r-- | sys/arm/ti/am335x/am335x_dmtreg.h | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/sys/arm/ti/am335x/am335x_dmtpps.c b/sys/arm/ti/am335x/am335x_dmtpps.c index b05437a..2c4e634 100644 --- a/sys/arm/ti/am335x/am335x_dmtpps.c +++ b/sys/arm/ti/am335x/am335x_dmtpps.c @@ -463,6 +463,14 @@ dmtpps_attach(device_t dev) sc->tmr_num = ti_hwmods_get_unit(dev, "timer"); snprintf(sc->tmr_name, sizeof(sc->tmr_name), "DMTimer%d", sc->tmr_num); + /* + * Configure the timer pulse/capture pin to input/capture mode. This is + * required in addition to configuring the pin as input with the pinmux + * controller (which was done via fdt data or tunable at probe time). + */ + sc->tclr = DMT_TCLR_GPO_CFG; + DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); + /* Set up timecounter hardware, start it. */ DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET); while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET) diff --git a/sys/arm/ti/am335x/am335x_dmtreg.h b/sys/arm/ti/am335x/am335x_dmtreg.h index 8a9d637..f2ef54d 100644 --- a/sys/arm/ti/am335x/am335x_dmtreg.h +++ b/sys/arm/ti/am335x/am335x_dmtreg.h @@ -62,7 +62,7 @@ #define DMT_TCLR_TRGMODE_BOTH (2 << 10) /* Trigger on match + ovflow */ #define DMT_TCLR_PWM_PTOGGLE (1 << 12) /* PWM toggles */ #define DMT_TCLR_CAP_MODE_2ND (1 << 13) /* Capture second event mode */ -#define DMT_TCLR_GPO_CFG (1 << 14) /* (no descr in datasheet) */ +#define DMT_TCLR_GPO_CFG (1 << 14) /* Tmr pin conf, 0=out, 1=in */ #define DMT_TCRR 0x3C /* Counter Register */ #define DMT_TLDR 0x40 /* Load Reg */ #define DMT_TTGR 0x44 /* Trigger Reg */ |
