Adjust Marvell Discovery (MV78xxx) support to recognize newest chip revisions,

handle Z0 revision (early silicon) explicitly due to its quirks.

Obtained from:	Marvell, Semihalf

5 files changed, 42 insertions, 19 deletions

diff --git a/sys/arm/mv/common.c b/sys/arm/mv/common.c
index 1f64c5a..53ad91e 100644
--- a/sys/arm/mv/common.c
+++ b/sys/arm/mv/common.c
@@ -91,7 +91,8 @@ cpu_extra_feat(void)
 	uint32_t ef = 0;
 
 	soc_id(&dev, &rev);
-	if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100)
+	if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100_Z0 ||
+	    dev == MV_DEV_MV78100)
 		__asm __volatile("mrc p15, 1, %0, c15, c1, 0" : "=r" (ef));
 	else if (dev == MV_DEV_88F5182 || dev == MV_DEV_88F5281)
 		__asm __volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (ef));
@@ -166,6 +167,9 @@ soc_identify(void)
 		else if (r == 2)
 			rev = "A0";
 		break;
+	case MV_DEV_MV78100_Z0:
+		dev = "Marvell MV78100 Z0";
+		break;
 	case MV_DEV_MV78100:
 		dev = "Marvell MV78100";
 		break;
@@ -199,15 +203,16 @@ soc_decode_win(void)
 	decode_win_cpu_setup();
 	decode_win_usb_setup();
 	decode_win_eth_setup(MV_ETH0_BASE);
-	if (dev == MV_DEV_MV78100)
+	if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0)
 		decode_win_eth_setup(MV_ETH1_BASE);
-	if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100)
+	if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100 ||
+	    dev == MV_DEV_MV78100_Z0)
 		decode_win_cesa_setup();
 
 	decode_win_idma_setup();
 	decode_win_xor_setup();
 
-	if (dev == MV_DEV_MV78100) {
+	if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0) {
 		decode_win_pcie_setup(MV_PCIE00_BASE);
 		decode_win_pcie_setup(MV_PCIE01_BASE);
 		decode_win_pcie_setup(MV_PCIE02_BASE);
@@ -360,7 +365,8 @@ win_cpu_can_remap(int i)
 	if ((dev == MV_DEV_88F5182 && i < 2) ||
 	    (dev == MV_DEV_88F5281 && i < 4) ||
 	    (dev == MV_DEV_88F6281 && i < 4) ||
-	    (dev == MV_DEV_MV78100 && i < 8))
+	    (dev == MV_DEV_MV78100 && i < 8) ||
+	    (dev == MV_DEV_MV78100_Z0 && i < 8))
 		return (1);
 
 	return (0);
@@ -590,7 +596,7 @@ usb_max_ports(void)
 	uint32_t dev, rev;
 
 	soc_id(&dev, &rev);
-	return (dev == MV_DEV_MV78100 ? 3 : 1);
+	return ((dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0) ? 3 : 1);
 }
 
 static void
@@ -1109,14 +1115,18 @@ win_xor_can_remap(int i)
 	return (0);
 }
 
-static __inline int
+static int
 xor_max_eng(void)
 {
 	uint32_t dev, rev;
 
 	soc_id(&dev, &rev);
-	return ((dev == MV_DEV_88F6281) ? 2 :
-	    (dev == MV_DEV_MV78100) ? 1 : 0);
+	if (dev == MV_DEV_88F6281)
+		return (2);
+	else if ((dev == MV_DEV_MV78100) || (dev == MV_DEV_MV78100_Z0))
+		return (1);
+	else
+		return (0);
 }
 
 static void
diff --git a/sys/arm/mv/gpio.c b/sys/arm/mv/gpio.c
index 9045455..84649f0 100644
--- a/sys/arm/mv/gpio.c
+++ b/sys/arm/mv/gpio.c
@@ -123,12 +123,13 @@ mv_gpio_attach(device_t dev)
 		return (ENXIO);
 	mv_gpio_softc = sc;
 
-	/* Get board id and revision */
+	/* Get chip id and revision */
 	soc_id(&dev_id, &rev_id);
 
 	if (dev_id == MV_DEV_88F5182 ||
 	    dev_id == MV_DEV_88F5281 ||
-	    dev_id == MV_DEV_MV78100) {
+	    dev_id == MV_DEV_MV78100 ||
+	    dev_id == MV_DEV_MV78100_Z0 ) {
 		sc->pin_num = 32;
 		sc->irq_num = 4;
 		sc->use_high = 0;
@@ -139,7 +140,7 @@ mv_gpio_attach(device_t dev)
 		sc->use_high = 1;
 
 	} else {
-		device_printf(dev, "unknown board id=0x%x\n", dev_id);
+		device_printf(dev, "unknown chip id=0x%x\n", dev_id);
 		return (ENXIO);
 	}
 
diff --git a/sys/arm/mv/ic.c b/sys/arm/mv/ic.c
index 47db7c4..d449e16 100644
--- a/sys/arm/mv/ic.c
+++ b/sys/arm/mv/ic.c
@@ -98,10 +98,11 @@ mv_ic_attach(device_t dev)
 	sc->ic_high_regs = 0;
 	sc->ic_error_regs = 0;
 
-	if (dev_id == MV_DEV_88F6281 || dev_id == MV_DEV_MV78100)
+	if (dev_id == MV_DEV_88F6281 || dev_id == MV_DEV_MV78100 ||
+	    dev_id == MV_DEV_MV78100_Z0)
 		sc->ic_high_regs = 1;
 
-	if (dev_id == MV_DEV_MV78100)
+	if (dev_id == MV_DEV_MV78100 || dev_id == MV_DEV_MV78100_Z0)
 		sc->ic_error_regs = 1;
 
 	error = bus_alloc_resources(dev, mv_ic_spec, sc->ic_res);
diff --git a/sys/arm/mv/mv_pci.c b/sys/arm/mv/mv_pci.c
index 61a64a1..26cd1f5 100644
--- a/sys/arm/mv/mv_pci.c
+++ b/sys/arm/mv/mv_pci.c
@@ -459,8 +459,18 @@ pcib_mbus_probe(device_t self)
 		id = "88F6281";
 		break;
 	case 0x6381:
+		id = "MV78100 Z0";
+		break;
+	case 0x7810:
 		id = "MV78100";
 		break;
+	case 0x7820:
+		/*
+		 * According to documentation ID 0x7820 is assigned to MV78200.
+		 * However some MV78100 chips also use it.
+		 */
+		id = "MV78100/MV78200";
+		break;
 	default:
 		device_printf(self, "unknown Marvell PCI bridge: %x\n", val);
 		goto out;
diff --git a/sys/arm/mv/mvreg.h b/sys/arm/mv/mvreg.h
index 3efd2cd..2551b1b 100644
--- a/sys/arm/mv/mvreg.h
+++ b/sys/arm/mv/mvreg.h
@@ -471,11 +471,12 @@
 /*
  * Chip ID
  */
-#define MV_DEV_88F5181	0x5181
-#define MV_DEV_88F5182	0x5182
-#define MV_DEV_88F5281	0x5281
-#define MV_DEV_88F6281	0x6281
-#define MV_DEV_MV78100	0x6381
+#define MV_DEV_88F5181		0x5181
+#define MV_DEV_88F5182		0x5182
+#define MV_DEV_88F5281		0x5281
+#define MV_DEV_88F6281		0x6281
+#define MV_DEV_MV78100_Z0	0x6381
+#define MV_DEV_MV78100		0x7810
 
 /*
  * Decode windows definitions and macros