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authorian <ian@FreeBSD.org>2013-12-13 22:21:04 +0000
committerian <ian@FreeBSD.org>2013-12-13 22:21:04 +0000
commit26cb2d59033503aeb133ddca9661bc9a03404083 (patch)
treef5a6773069a4c6a1c86f076e841188a383097183 /sys/arm
parent52408050e1b85698749984f9c40d16375b2e7566 (diff)
downloadFreeBSD-src-26cb2d59033503aeb133ddca9661bc9a03404083.zip
FreeBSD-src-26cb2d59033503aeb133ddca9661bc9a03404083.tar.gz
MFC r257407:
Expand the list of compatible devices this driver works with. Increase the target frequency from 1 to 10 MHz because these SoCs are plenty fast enough to benefit from the extra event timer resolution.
Diffstat (limited to 'sys/arm')
-rw-r--r--sys/arm/freescale/imx/imx_gpt.c27
1 files changed, 17 insertions, 10 deletions
diff --git a/sys/arm/freescale/imx/imx_gpt.c b/sys/arm/freescale/imx/imx_gpt.c
index 7841704..5c0b836 100644
--- a/sys/arm/freescale/imx/imx_gpt.c
+++ b/sys/arm/freescale/imx/imx_gpt.c
@@ -95,7 +95,7 @@ struct imx_gpt_softc *imx_gpt_sc = NULL;
static const int imx_gpt_delay_count = 78;
/* Try to divide down an available fast clock to this frequency. */
-#define TARGET_FREQUENCY 1000000
+#define TARGET_FREQUENCY 10000000
/* Don't try to set an event timer period smaller than this. */
#define MIN_ET_PERIOD 10LLU
@@ -107,16 +107,26 @@ static struct resource_spec imx_gpt_spec[] = {
{ -1, 0 }
};
+static struct ofw_compat_data compat_data[] = {
+ {"fsl,imx6q-gpt", 1},
+ {"fsl,imx53-gpt", 1},
+ {"fsl,imx51-gpt", 1},
+ {"fsl,imx31-gpt", 1},
+ {"fsl,imx27-gpt", 1},
+ {"fsl,imx25-gpt", 1},
+ {NULL, 0}
+};
+
static int
imx_gpt_probe(device_t dev)
{
- if (!ofw_bus_is_compatible(dev, "fsl,imx51-gpt") &&
- !ofw_bus_is_compatible(dev, "fsl,imx53-gpt"))
- return (ENXIO);
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
+ device_set_desc(dev, "Freescale i.MX GPT timer");
+ return (BUS_PROBE_DEFAULT);
+ }
- device_set_desc(dev, "Freescale i.MX GPT timer");
- return (BUS_PROBE_DEFAULT);
+ return (ENXIO);
}
static int
@@ -142,10 +152,7 @@ imx_gpt_attach(device_t dev)
* we're running on. Eventually we could allow selection from the fdt;
* the code in this driver will cope with any clock frequency.
*/
- if (ofw_bus_is_compatible(dev, "fsl,imx6-gpt"))
- sc->sc_clksrc = GPT_CR_CLKSRC_24M;
- else
- sc->sc_clksrc = GPT_CR_CLKSRC_IPG;
+ sc->sc_clksrc = GPT_CR_CLKSRC_IPG;
ctlreg = 0;
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