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| author | cognet <cognet@FreeBSD.org> | 2005-02-26 18:59:01 +0000 |
|---|---|---|
| committer | cognet <cognet@FreeBSD.org> | 2005-02-26 18:59:01 +0000 |
| commit | 43586d701a28a6b1ef236ac59977399f1c91658e (patch) | |
| tree | 754a92db74155793fdb77b1dabe591af0404d9f8 /sys/arm/xscale/std.xscale | |
| parent | d017d1bb8095eeec8316d252936d8810684f8c64 (diff) | |
| download | FreeBSD-src-43586d701a28a6b1ef236ac59977399f1c91658e.zip FreeBSD-src-43586d701a28a6b1ef236ac59977399f1c91658e.tar.gz | |
Instead of using sysarch() to store-retrieve the tp, add a magic address,
ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache
line will be allocated and locked for this address, so that it will never go
to RAM. On CPUs that does not, a page is allocated for it (it will be a bit
slower, and is wrong for SMP, but should be fine for UP).
The tp is still stored in the mdthread struct, and at each context switch,
ARM_TP_ADDRESS gets updated.
Suggested by: davidxu
Diffstat (limited to 'sys/arm/xscale/std.xscale')
| -rw-r--r-- | sys/arm/xscale/std.xscale | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/arm/xscale/std.xscale b/sys/arm/xscale/std.xscale new file mode 100644 index 0000000..48c588f --- /dev/null +++ b/sys/arm/xscale/std.xscale @@ -0,0 +1,2 @@ +# $FreeBSD$ +options ARM_CACHE_LOCK_ENABLE |
