From 43586d701a28a6b1ef236ac59977399f1c91658e Mon Sep 17 00:00:00 2001 From: cognet Date: Sat, 26 Feb 2005 18:59:01 +0000 Subject: Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu --- sys/arm/xscale/std.xscale | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 sys/arm/xscale/std.xscale (limited to 'sys/arm/xscale/std.xscale') diff --git a/sys/arm/xscale/std.xscale b/sys/arm/xscale/std.xscale new file mode 100644 index 0000000..48c588f --- /dev/null +++ b/sys/arm/xscale/std.xscale @@ -0,0 +1,2 @@ +# $FreeBSD$ +options ARM_CACHE_LOCK_ENABLE -- cgit v1.1