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| author | ian <ian@FreeBSD.org> | 2013-08-21 04:20:17 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2013-08-21 04:20:17 +0000 |
| commit | 7d7f7f1bb2a7a63aa6191f75bc43e56fbee96565 (patch) | |
| tree | ba102a6a6204282accf6e98b1f07abe2029eb26b /sys/arm/ti/am335x/am335x_prcm.c | |
| parent | bd47afb2893407b47a1dc3c9165507d2aa77b5b7 (diff) | |
| download | FreeBSD-src-7d7f7f1bb2a7a63aa6191f75bc43e56fbee96565.zip FreeBSD-src-7d7f7f1bb2a7a63aa6191f75bc43e56fbee96565.tar.gz | |
Define the uart clocks so that they can be en/disabled at runtime.
Diffstat (limited to 'sys/arm/ti/am335x/am335x_prcm.c')
| -rw-r--r-- | sys/arm/ti/am335x/am335x_prcm.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/sys/arm/ti/am335x/am335x_prcm.c b/sys/arm/ti/am335x/am335x_prcm.c index 715153f..e0f0d7e 100644 --- a/sys/arm/ti/am335x/am335x_prcm.c +++ b/sys/arm/ti/am335x/am335x_prcm.c @@ -62,9 +62,14 @@ __FBSDID("$FreeBSD$"); #define CM_PER_LCDC_CLKCTRL (CM_PER + 0x018) #define CM_PER_USB0_CLKCTRL (CM_PER + 0x01C) #define CM_PER_TPTC0_CLKCTRL (CM_PER + 0x024) +#define CM_PER_UART5_CLKCTRL (CM_PER + 0x038) #define CM_PER_MMC0_CLKCTRL (CM_PER + 0x03C) #define CM_PER_I2C2_CLKCTRL (CM_PER + 0x044) #define CM_PER_I2C1_CLKCTRL (CM_PER + 0x048) +#define CM_PER_UART1_CLKCTRL (CM_PER + 0x06C) +#define CM_PER_UART2_CLKCTRL (CM_PER + 0x070) +#define CM_PER_UART3_CLKCTRL (CM_PER + 0x074) +#define CM_PER_UART4_CLKCTRL (CM_PER + 0x078) #define CM_PER_TIMER7_CLKCTRL (CM_PER + 0x07C) #define CM_PER_TIMER2_CLKCTRL (CM_PER + 0x080) #define CM_PER_TIMER3_CLKCTRL (CM_PER + 0x084) @@ -146,6 +151,9 @@ static int am335x_clk_musb0_activate(struct ti_clock_dev *clkdev); static int am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev); static int am335x_clk_pruss_activate(struct ti_clock_dev *clkdev); +#define AM335X_NOOP_CLOCK_DEV(i) \ + { .id = (i) } + #define AM335X_GENERIC_CLOCK_DEV(i) \ { .id = (i), \ .clk_activate = am335x_clk_generic_activate, \ @@ -217,6 +225,14 @@ struct ti_clock_dev ti_clk_devmap[] = { .clk_get_source_freq = am335x_clk_get_arm_disp_freq, }, + /* UART. Uart0 clock cannot be controlled. */ + AM335X_NOOP_CLOCK_DEV(UART0_CLK), + AM335X_GENERIC_CLOCK_DEV(UART1_CLK), + AM335X_GENERIC_CLOCK_DEV(UART2_CLK), + AM335X_GENERIC_CLOCK_DEV(UART3_CLK), + AM335X_GENERIC_CLOCK_DEV(UART4_CLK), + AM335X_GENERIC_CLOCK_DEV(UART5_CLK), + /* DMTimer */ AM335X_GENERIC_CLOCK_DEV(DMTIMER2_CLK), AM335X_GENERIC_CLOCK_DEV(DMTIMER3_CLK), @@ -286,6 +302,14 @@ struct am335x_clk_details { static struct am335x_clk_details g_am335x_clk_details[] = { + /* UART. UART0 clock not controllable. */ + _CLK_DETAIL(UART0_CLK, 0, 0), + _CLK_DETAIL(UART1_CLK, CM_PER_UART1_CLKCTRL, 0), + _CLK_DETAIL(UART2_CLK, CM_PER_UART2_CLKCTRL, 0), + _CLK_DETAIL(UART3_CLK, CM_PER_UART3_CLKCTRL, 0), + _CLK_DETAIL(UART4_CLK, CM_PER_UART4_CLKCTRL, 0), + _CLK_DETAIL(UART5_CLK, CM_PER_UART5_CLKCTRL, 0), + /* DMTimer modules */ _CLK_DETAIL(DMTIMER2_CLK, CM_PER_TIMER2_CLKCTRL, CLKSEL_TIMER2_CLK), _CLK_DETAIL(DMTIMER3_CLK, CM_PER_TIMER3_CLKCTRL, CLKSEL_TIMER3_CLK), |
