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authorandrew <andrew@FreeBSD.org>2015-04-11 17:16:23 +0000
committerandrew <andrew@FreeBSD.org>2015-04-11 17:16:23 +0000
commite2a65d5cfa2a52472daa9b9658f4fa10f742291f (patch)
tree3242f4dc9f4677a166d03c3acecc2475385f4f3d /sys/arm/samsung
parent7f65d178b4fad420cb01a2ff4b3163278d3025dc (diff)
downloadFreeBSD-src-e2a65d5cfa2a52472daa9b9658f4fa10f742291f.zip
FreeBSD-src-e2a65d5cfa2a52472daa9b9658f4fa10f742291f.tar.gz
Add support for the uart classes to set their default register shift value.
This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week
Diffstat (limited to 'sys/arm/samsung')
-rw-r--r--sys/arm/samsung/exynos/exynos_uart.c1
-rw-r--r--sys/arm/samsung/s3c2xx0/uart_dev_s3c2410.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/sys/arm/samsung/exynos/exynos_uart.c b/sys/arm/samsung/exynos/exynos_uart.c
index 9e33bcb..7b372de 100644
--- a/sys/arm/samsung/exynos/exynos_uart.c
+++ b/sys/arm/samsung/exynos/exynos_uart.c
@@ -380,6 +380,7 @@ static struct uart_class uart_exynos4210_class = {
.uc_ops = &uart_exynos4210_ops,
.uc_range = 8,
.uc_rclk = 0,
+ .uc_rshift = 0
};
static struct ofw_compat_data compat_data[] = {
diff --git a/sys/arm/samsung/s3c2xx0/uart_dev_s3c2410.c b/sys/arm/samsung/s3c2xx0/uart_dev_s3c2410.c
index 2ee1217..cc0d59a 100644
--- a/sys/arm/samsung/s3c2xx0/uart_dev_s3c2410.c
+++ b/sys/arm/samsung/s3c2xx0/uart_dev_s3c2410.c
@@ -402,4 +402,5 @@ struct uart_class uart_s3c2410_class = {
.uc_ops = &uart_s3c2410_ops,
.uc_range = 8,
.uc_rclk = 0,
+ .uc_rshift = 0
};
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