Update the StrongArm port to match the current code.

- Implement arm_mask_irqs and arm_unmask_irqs
- Provide the available physical address range after pmap_bootstrap allocated
things, instead or before, or bad things happen.

2 files changed, 15 insertions, 5 deletions

diff --git a/sys/arm/sa11x0/assabet_machdep.c b/sys/arm/sa11x0/assabet_machdep.c
index 04f637c..9ab80fc 100644
--- a/sys/arm/sa11x0/assabet_machdep.c
+++ b/sys/arm/sa11x0/assabet_machdep.c
@@ -134,7 +134,7 @@ struct pcpu __pcpu;
 struct pcpu *pcpup = &__pcpu;
 
 #ifndef MD_ROOT_SIZE
-#error SIMICS needs MD_ROOT and MD_ROOT_SIZE
+#define MD_ROOT_SIZE 65535
 #endif
 /* Physical and virtual addresses for some global pages */
 
@@ -400,14 +400,14 @@ initarm(void *arg, void *arg2)
 
 	pmap_curmaxkvaddr = freemempos + KERNEL_PT_VMDATA_NUM * 0x400000;
 
-	pmap_bootstrap(KERNEL_VM_BASE, 
+	pmap_bootstrap(freemempos, 
 	    0xd0000000, &kernel_l1pt);
 
 	
 	mutex_init();
 	
 	
-	phys_avail[0] = round_page(freemempos);
+	phys_avail[0] = round_page(virtual_avail);
 	phys_avail[1] = 0xc0000000 + 0x02000000 - 1;
 	phys_avail[2] = 0;
 	phys_avail[3] = 0;
diff --git a/sys/arm/sa11x0/sa11x0_irqhandler.c b/sys/arm/sa11x0/sa11x0_irqhandler.c
index c7e4030..a3f7db4 100644
--- a/sys/arm/sa11x0/sa11x0_irqhandler.c
+++ b/sys/arm/sa11x0/sa11x0_irqhandler.c
@@ -115,16 +115,26 @@ arm_get_irqnb(void *frame)
 	return(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAIPIC_IP));
 }
 
+static uint32_t sa11x0_irq_mask = 0xfffffff;
+
+extern vm_offset_t saipic_base;
+
 void
 arm_mask_irqs(int irq)
 {
-	/* XXX */	
+
+	sa11x0_irq_mask &= ~irq;
+	__asm __volatile("str	%0, [%1, #0x04]" /* SAIPIC_MR */
+	    : : "r" (sa11x0_irq_mask), "r" (saipic_base));
 }
 
 void
 arm_unmask_irqs(int irq)
 {
-	/* XXX */
+
+	sa11x0_irq_mask |= irq;
+	__asm __volatile("str	%0, [%1, #0x04]" /* SAIPIC_MR */
+	    : : "r" (sa11x0_irq_mask), "r" (saipic_base));
 }
 
 void stray_irqhandler(void *);