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authorraj <raj@FreeBSD.org>2008-11-19 11:57:16 +0000
committerraj <raj@FreeBSD.org>2008-11-19 11:57:16 +0000
commitd8ed8b66e61ebe7d14f72986b26430fa74f6973c (patch)
tree458e19217e8562fdb5a294ca6a386340aac7689c /sys/arm/mv/mvvar.h
parent59c341efe8739a9ca3f1073acf15eb71579b561f (diff)
downloadFreeBSD-src-d8ed8b66e61ebe7d14f72986b26430fa74f6973c.zip
FreeBSD-src-d8ed8b66e61ebe7d14f72986b26430fa74f6973c.tar.gz
Improve style(9) and other cosmetics in Marvell SOCs code.
Diffstat (limited to 'sys/arm/mv/mvvar.h')
-rw-r--r--sys/arm/mv/mvvar.h60
1 files changed, 30 insertions, 30 deletions
diff --git a/sys/arm/mv/mvvar.h b/sys/arm/mv/mvvar.h
index 79aeec6..645c9ac7 100644
--- a/sys/arm/mv/mvvar.h
+++ b/sys/arm/mv/mvvar.h
@@ -95,27 +95,27 @@ struct decode_win {
};
extern const struct obio_pci mv_pci_info[];
-extern bus_space_tag_t obio_tag;
-extern struct obio_device obio_devices[];
-extern const struct decode_win *cpu_wins;
-extern const struct decode_win *idma_wins;
-extern int cpu_wins_no;
-extern int idma_wins_no;
+extern bus_space_tag_t obio_tag;
+extern struct obio_device obio_devices[];
+extern const struct decode_win *cpu_wins;
+extern const struct decode_win *idma_wins;
+extern int cpu_wins_no;
+extern int idma_wins_no;
/* Function prototypes */
-int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
+int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);
-void mv_gpio_intr_mask(int pin);
-void mv_gpio_intr_unmask(int pin);
-int mv_gpio_configure(uint32_t pin, uint32_t flags, uint32_t mask);
-void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
-uint8_t mv_gpio_in(uint32_t pin);
-
-int platform_pmap_init(void);
-int soc_decode_win(void);
-void soc_id(uint32_t *dev, uint32_t *rev);
-void soc_identify(void);
-void soc_dump_decode_win(void);
+void mv_gpio_intr_mask(int pin);
+void mv_gpio_intr_unmask(int pin);
+int mv_gpio_configure(uint32_t pin, uint32_t flags, uint32_t mask);
+void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
+uint8_t mv_gpio_in(uint32_t pin);
+
+int platform_pmap_init(void);
+int soc_decode_win(void);
+void soc_id(uint32_t *dev, uint32_t *rev);
+void soc_identify(void);
+void soc_dump_decode_win(void);
uint32_t soc_power_ctrl_get(uint32_t mask);
int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
@@ -123,20 +123,20 @@ int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
int decode_win_overlap(int, int, const struct decode_win *);
int win_cpu_can_remap(int);
-void decode_win_idma_dump(void);
-void decode_win_idma_setup(void);
-int decode_win_idma_valid(void);
+void decode_win_idma_dump(void);
+void decode_win_idma_setup(void);
+int decode_win_idma_valid(void);
-int ddr_is_active(int i);
-uint32_t ddr_base(int i);
-uint32_t ddr_size(int i);
-uint32_t ddr_attr(int i);
-uint32_t ddr_target(int i);
+int ddr_is_active(int i);
+uint32_t ddr_base(int i);
+uint32_t ddr_size(int i);
+uint32_t ddr_attr(int i);
+uint32_t ddr_target(int i);
-uint32_t cpu_extra_feat(void);
-uint32_t get_tclk(void);
-uint32_t read_cpu_ctrl(uint32_t);
-void write_cpu_ctrl(uint32_t, uint32_t);
+uint32_t cpu_extra_feat(void);
+uint32_t get_tclk(void);
+uint32_t read_cpu_ctrl(uint32_t);
+void write_cpu_ctrl(uint32_t, uint32_t);
enum mbus_device_ivars {
MBUS_IVAR_BASE,
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