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| author | gonzo <gonzo@FreeBSD.org> | 2012-08-15 05:15:49 +0000 |
|---|---|---|
| committer | gonzo <gonzo@FreeBSD.org> | 2012-08-15 05:15:49 +0000 |
| commit | 8b8633cc987a479a321d1f508e8cbed2e3b0907a (patch) | |
| tree | 5d41b0c203c7eee2fd144c67899fe39cfcdef717 /sys/arm/mv/mvvar.h | |
| parent | 08c3a17117fbf4a3289526d99ca74f9ccbc8c3b4 (diff) | |
| download | FreeBSD-src-8b8633cc987a479a321d1f508e8cbed2e3b0907a.zip FreeBSD-src-8b8633cc987a479a321d1f508e8cbed2e3b0907a.tar.gz | |
Merging of projects/armv6, part 7
Add Marvell ARMADA XP support
Obtained from: Marvell, Semihalf
Diffstat (limited to 'sys/arm/mv/mvvar.h')
| -rw-r--r-- | sys/arm/mv/mvvar.h | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/sys/arm/mv/mvvar.h b/sys/arm/mv/mvvar.h index c0e5512..b27de27 100644 --- a/sys/arm/mv/mvvar.h +++ b/sys/arm/mv/mvvar.h @@ -41,6 +41,7 @@ #define _MVVAR_H_ #include <sys/rman.h> +#include <machine/bus.h> #include <vm/vm.h> #include <vm/pmap.h> #include <machine/pmap.h> @@ -49,6 +50,9 @@ #define MV_TYPE_PCI 0 #define MV_TYPE_PCIE 1 +#define MV_MODE_ENDPOINT 0 +#define MV_MODE_ROOT 1 + struct gpio_config { int gc_gpio; /* GPIO number */ uint32_t gc_flags; /* GPIO flags */ @@ -60,11 +64,12 @@ struct decode_win { int attr; /* Attributes of the target interface */ vm_paddr_t base; /* Physical base addr */ uint32_t size; - int remap; + vm_paddr_t remap; }; extern const struct pmap_devmap pmap_devmap[]; extern const struct gpio_config mv_gpio_config[]; +extern const struct decode_win *cpu_wins; extern const struct decode_win *idma_wins; extern const struct decode_win *xor_wins; extern int idma_wins_no; @@ -86,9 +91,10 @@ uint32_t soc_power_ctrl_get(uint32_t mask); void soc_power_ctrl_set(uint32_t mask); int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size, - int remap); + vm_paddr_t remap); int decode_win_overlap(int, int, const struct decode_win *); int win_cpu_can_remap(int); +void decode_win_pcie_setup(u_long); int ddr_is_active(int i); uint32_t ddr_base(int i); @@ -98,7 +104,26 @@ uint32_t ddr_target(int i); uint32_t cpu_extra_feat(void); uint32_t get_tclk(void); +uint32_t get_l2clk(void); uint32_t read_cpu_ctrl(uint32_t); void write_cpu_ctrl(uint32_t, uint32_t); +int mv_pcib_bar_win_set(device_t dev, uint32_t base, uint32_t size, + uint32_t remap, int winno, int busno); +int mv_pcib_cpu_win_remap(device_t dev, uint32_t remap, uint32_t size); + +void mv_mask_endpoint_irq(uintptr_t nb, int unit); +void mv_unmask_endpoint_irq(uintptr_t nb, int unit); + +int mv_drbl_get_next_irq(int dir, int unit); +void mv_drbl_mask_all(int unit); +void mv_drbl_mask_irq(uint32_t irq, int dir, int unit); +void mv_drbl_unmask_irq(uint32_t irq, int dir, int unit); +void mv_drbl_set_mask(uint32_t val, int dir, int unit); +uint32_t mv_drbl_get_mask(int dir, int unit); +void mv_drbl_set_cause(uint32_t val, int dir, int unit); +uint32_t mv_drbl_get_cause(int dir, int unit); +void mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit); +uint32_t mv_drbl_get_msg(int mnr, int dir, int unit); + #endif /* _MVVAR_H_ */ |
